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| author | Joern Rennecke <joern.rennecke@embecosm.com> | 2013-08-19 15:11:55 +0000 |
|---|---|---|
| committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2013-08-19 16:11:55 +0100 |
| commit | dced9cd71aa491b1d62d836506fe497e165caa51 (patch) | |
| tree | af51055cd6ae591dbd1f32ecc00db109a036aba4 | |
| parent | 9485d254d16e4f64b5c853b8f16a6cd476cf333b (diff) | |
| download | gcc-dced9cd71aa491b1d62d836506fe497e165caa51.zip gcc-dced9cd71aa491b1d62d836506fe497e165caa51.tar.gz gcc-dced9cd71aa491b1d62d836506fe497e165caa51.tar.bz2 | |
ssa-dom-thread-4.c [avr-*-*]: Expect 6 times "Threaded".
* gcc.dg/tree-ssa/ssa-dom-thread-4.c [avr-*-*]: Expect 6 times
"Threaded".
From-SVN: r201842
| -rw-r--r-- | gcc/testsuite/ChangeLog | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c | 6 |
2 files changed, 7 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6348efe..dbab61a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -2,6 +2,9 @@ * gcc.target/avr/progmem-error-1.cpp: Update linenumber of error. + * gcc.dg/tree-ssa/ssa-dom-thread-4.c [avr-*-*]: Expect 6 times + "Threaded". + 2013-08-18 Jan Hubicka <jh@suse.cz> * g++.dg/ipa/type-inheritance-1.C: New testcase. diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c index 44b05f0..e97719f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c @@ -61,7 +61,7 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b, zero. */ /* ARM Cortex-M0 defined LOGICAL_OP_NON_SHORT_CIRCUIT to false, so skip below test. */ -/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { ! { mips*-*-* || { arm_cortex_m && arm_thumb1 } } } } } } */ +/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { ! { { mips*-*-* avr-*-* } || { arm_cortex_m && arm_thumb1 } } } } } } */ /* MIPS defines LOGICAL_OP_NON_SHORT_CIRCUIT to 0, so we split both "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each, rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets, @@ -81,6 +81,8 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b, -> "kill_elt->indx == b_elt->indx" in the second condition, skipping the known-true "b_elt && kill_elt" in the second condition. */ -/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-* } } } */ +/* For avr, BRANCH_COST is by default 0, so the default + LOGICAL_OP_NON_SHORT_CIRCUIT definition also computes as 0. */ +/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-* avr-*-* } } } */ /* { dg-final { cleanup-tree-dump "dom1" } } */ |