diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-01-25 11:24:32 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-01-25 11:24:32 +0000 |
| commit | da43e287d1917a25594f95c7c519ded637c7ea50 (patch) | |
| tree | 7c44e4a0c2e451437993d8ddcfd21bb43ded64a1 | |
| parent | 7c47a3bea6f270a6e0a778eb1acd5f76e863213f (diff) | |
| download | gcc-da43e287d1917a25594f95c7c519ded637c7ea50.zip gcc-da43e287d1917a25594f95c7c519ded637c7ea50.tar.gz gcc-da43e287d1917a25594f95c7c519ded637c7ea50.tar.bz2 | |
aarch64: Restore generation of SVE UQDEC instructions
The addition of TARGET_CSSC meant that we wouldn't generate SVE
UQDEC instructions unless +cssc was also enabled.
Fixes:
- gcc.target/aarch64/sve/slp_4.c
- gcc.target/aarch64/sve/slp_10.c
- gcc.target/aarch64/sve/while_4.c
gcc/
* config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
tests.
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index e4d7587..0b326d4 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4457,8 +4457,9 @@ { if (aarch64_sve_cnt_immediate (operands[1], <MODE>mode)) std::swap (operands[1], operands[2]); - else if (!aarch64_sve_cnt_immediate (operands[2], <MODE>mode) - && TARGET_CSSC) + else if (aarch64_sve_cnt_immediate (operands[2], <MODE>mode)) + ; + else if (TARGET_CSSC) { if (aarch64_uminmax_immediate (operands[1], <MODE>mode)) std::swap (operands[1], operands[2]); |