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author | Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | 2021-05-05 21:11:45 +0530 |
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committer | Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | 2021-05-05 21:11:45 +0530 |
commit | d9937da063e5847f45f7f1f7a02bed7dbc8fb2f6 (patch) | |
tree | 27259dd57f59c93b7749256685a05277759ed6d0 | |
parent | b927ffdd6cecd0eeda6ef77df2623519870b1e75 (diff) | |
download | gcc-d9937da063e5847f45f7f1f7a02bed7dbc8fb2f6.zip gcc-d9937da063e5847f45f7f1f7a02bed7dbc8fb2f6.tar.gz gcc-d9937da063e5847f45f7f1f7a02bed7dbc8fb2f6.tar.bz2 |
arm/97903: Missed optimization in lowering test operation.
gcc/ChangeLog:
2021-05-05 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* config/arm/neon.md (neon_vtst_combine<mode>): New pattern.
* config/arm/predicates.md (minus_one_operand): New predicate.
-rw-r--r-- | gcc/config/arm/neon.md | 13 | ||||
-rw-r--r-- | gcc/config/arm/predicates.md | 4 |
2 files changed, 17 insertions, 0 deletions
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index fec2cc9..2a1e304 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -2588,6 +2588,19 @@ [(set_attr "type" "neon_tst<q>")] ) +(define_insn "neon_vtst_combine<mode>" + [(set (match_operand:VDQIW 0 "s_register_operand" "=w") + (plus:VDQIW + (eq:VDQIW + (and:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w") + (match_operand:VDQIW 2 "s_register_operand" "w")) + (match_operand:VDQIW 3 "zero_operand" "i")) + (match_operand:VDQIW 4 "minus_one_operand" "i")))] + "TARGET_NEON" + "vtst.<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2" + [(set_attr "type" "neon_tst<q>")] +) + (define_insn "neon_vabd<sup><mode>" [(set (match_operand:VDQIW 0 "s_register_operand" "=w") (unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w") diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index c661f01..9db061d 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -200,6 +200,10 @@ (and (match_code "const_int,const_double,const_vector") (match_test "op == CONST0_RTX (mode)"))) +(define_predicate "minus_one_operand" + (and (match_code "const_int,const_double,const_vector") + (match_test "op == CONSTM1_RTX (mode)"))) + ;; Match a register, or zero in the appropriate mode. (define_predicate "reg_or_zero_operand" (ior (match_operand 0 "s_register_operand") |