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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-02-04 19:25:46 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@gcc.gnu.org> | 2015-02-04 19:25:46 +0000 |
| commit | d8f70d78cb9f8f6ccd7539b1ea4c681b8a06a095 (patch) | |
| tree | 2d52a14e114bb37910f90253b950e18e1b67c450 | |
| parent | a4be4e91d20c89ff2058d13ec957b588b1c272a4 (diff) | |
| download | gcc-d8f70d78cb9f8f6ccd7539b1ea4c681b8a06a095.zip gcc-d8f70d78cb9f8f6ccd7539b1ea4c681b8a06a095.tar.gz gcc-d8f70d78cb9f8f6ccd7539b1ea4c681b8a06a095.tar.bz2 | |
[AArch64] Add support for -mcpu=cortex-a72
2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
gcc/
* config/aarch64/aarch64-cores.def: Add cortex-a72 and
cortex-a72.cortex-a53.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (AArch64 Options/-mtune): Add "cortex-a72".
From-SVN: r220413
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-cores.def | 2 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-tune.md | 2 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 8 |
4 files changed, 14 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 74728f8..2507b89 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-02-04 Matthew Wahab <matthew.wahab@arm.com> + + * config/aarch64/aarch64-cores.def: Add cortex-a72 and + cortex-a72.cortex-a53. + * config/aarch64/aarch64-tune.md: Regenerate. + * doc/invoke.texi (AArch64 Options/-mtune): Add "cortex-a72". + 2015-02-04 Nick Clifton <nickc@redhat.com> * config/rl78/rl78.c (rl78_note_reg_set): Note the use of REGs diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index f978eb1..9b2eca2 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -36,9 +36,11 @@ AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53) AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) +AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) AARCH64_CORE("thunderx", thunderx, thunderx, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx) AARCH64_CORE("xgene1", xgene1, xgene1, 8, AARCH64_FL_FOR_ARCH8, xgene1) /* V8 big.LITTLE implementations. */ AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) +AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index 80f59c8..c3305f9 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa53,cortexa57,thunderx,xgene1,cortexa57cortexa53" + "cortexa53,cortexa57,cortexa72,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 0aae187..e74c6bb 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12098,12 +12098,12 @@ architecture. @opindex mtune Specify the name of the target processor for which GCC should tune the performance of the code. Permissible values for this option are: -@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{thunderx}, -@samp{xgene1}. +@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, +@samp{cortex-a72}, @samp{thunderx}, @samp{xgene1}. Additionally, this option can specify that GCC should tune the performance -of the code for a big.LITTLE system. The only permissible value is -@samp{cortex-a57.cortex-a53}. +of the code for a big.LITTLE system. Permissible values for this +option are: @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}. Where none of @option{-mtune=}, @option{-mcpu=} or @option{-march=} are specified, the code is tuned to perform well across a range |