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author | Richard Henderson <rth@redhat.com> | 2002-03-23 18:23:47 -0800 |
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committer | Richard Henderson <rth@gcc.gnu.org> | 2002-03-23 18:23:47 -0800 |
commit | d88e57d1fb9910215fb1fc57d6da2ae6799a8529 (patch) | |
tree | 8bd5eac77194b9d9f1b7aeda8b6931c393eeb7e1 | |
parent | 6dfaf9ba0dd58f04e097d124977322a35859f6fe (diff) | |
download | gcc-d88e57d1fb9910215fb1fc57d6da2ae6799a8529.zip gcc-d88e57d1fb9910215fb1fc57d6da2ae6799a8529.tar.gz gcc-d88e57d1fb9910215fb1fc57d6da2ae6799a8529.tar.bz2 |
sparc.c (sparc_emit_floatunsdi): New.
* config/sparc/sparc.c (sparc_emit_floatunsdi): New.
* config/sparc/sparc-protos.h: Update.
* config/sparc/sparc.md (floatunsdisf2, floatunsdidf2): New.
From-SVN: r51249
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/sparc/sparc-protos.h | 1 | ||||
-rw-r--r-- | gcc/config/sparc/sparc.c | 36 | ||||
-rw-r--r-- | gcc/config/sparc/sparc.md | 12 |
4 files changed, 55 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ed88252..5320d13 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2002-03-23 Richard Henderson <rth@redhat.com> + * config/sparc/sparc.c (sparc_emit_floatunsdi): New. + * config/sparc/sparc-protos.h: Update. + * config/sparc/sparc.md (floatunsdisf2, floatunsdidf2): New. + +2002-03-23 Richard Henderson <rth@redhat.com> + * config/sparc/gmon-sol2.c (internal_mcount): Assume either _start or _init begins the text segment. diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index 682b7bd..269844e 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -74,6 +74,7 @@ extern enum machine_mode select_cc_mode PARAMS ((enum rtx_code, rtx, rtx)); /* Define the function that build the compare insn for scc and bcc. */ extern rtx gen_compare_reg PARAMS ((enum rtx_code code, rtx, rtx)); extern void sparc_emit_float_lib_cmp PARAMS ((rtx, rtx, enum rtx_code)); +extern void sparc_emit_floatunsdi PARAMS ((rtx [2])); /* This function handles all v9 scc insns */ extern int gen_v9_scc PARAMS ((enum rtx_code, rtx *)); extern void sparc_initialize_trampoline PARAMS ((rtx, rtx, rtx)); diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index a18046c..d1fbe2d 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -5420,6 +5420,42 @@ sparc_emit_float_lib_cmp (x, y, comparison) } } +/* Generate an unsigned DImode to FP conversion. This is the same code + optabs would emit if we didn't have TFmode patterns. */ + +void +sparc_emit_floatunsdi (operands) + rtx operands[2]; +{ + rtx neglab, donelab, i0, i1, f0, in, out; + enum machine_mode mode; + + out = operands[0]; + in = force_reg (DImode, operands[1]); + mode = GET_MODE (out); + neglab = gen_label_rtx (); + donelab = gen_label_rtx (); + i0 = gen_reg_rtx (DImode); + i1 = gen_reg_rtx (DImode); + f0 = gen_reg_rtx (mode); + + emit_cmp_and_jump_insns (in, const0_rtx, LT, const0_rtx, DImode, 0, neglab); + + emit_insn (gen_rtx_SET (VOIDmode, out, gen_rtx_FLOAT (mode, in))); + emit_jump_insn (gen_jump (donelab)); + emit_barrier (); + + emit_label (neglab); + + emit_insn (gen_lshrdi3 (i0, in, const1_rtx)); + emit_insn (gen_anddi3 (i1, in, const1_rtx)); + emit_insn (gen_iordi3 (i0, i0, i1)); + emit_insn (gen_rtx_SET (VOIDmode, f0, gen_rtx_FLOAT (mode, i0))); + emit_insn (gen_rtx_SET (VOIDmode, out, gen_rtx_PLUS (mode, f0, f0))); + + emit_label (donelab); +} + /* Return the string to output a conditional branch to LABEL, testing register REG. LABEL is the operand number of the label; REG is the operand number of the reg. OP is the conditional expression. The mode diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index c203e4f..e1810f6 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -5243,6 +5243,12 @@ [(set_attr "type" "fp") (set_attr "fptype" "double")]) +(define_expand "floatunsdisf2" + [(use (match_operand:SF 0 "register_operand" "")) + (use (match_operand:DI 1 "register_operand" ""))] + "TARGET_ARCH64 && TARGET_FPU" + "sparc_emit_floatunsdi (operands); DONE;") + (define_insn "floatdidf2" [(set (match_operand:DF 0 "register_operand" "=e") (float:DF (match_operand:DI 1 "register_operand" "e")))] @@ -5251,6 +5257,12 @@ [(set_attr "type" "fp") (set_attr "fptype" "double")]) +(define_expand "floatunsdidf2" + [(use (match_operand:DF 0 "register_operand" "")) + (use (match_operand:DI 1 "register_operand" ""))] + "TARGET_ARCH64 && TARGET_FPU" + "sparc_emit_floatunsdi (operands); DONE;") + (define_expand "floatditf2" [(set (match_operand:TF 0 "register_operand" "=e") (float:TF (match_operand:DI 1 "register_operand" "e")))] |