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author | Andrew Carlotti <andrew.carlotti@arm.com> | 2024-10-21 16:22:09 +0100 |
---|---|---|
committer | Andrew Carlotti <andrew.carlotti@arm.com> | 2024-10-25 17:28:11 +0100 |
commit | d74b0c698c8feb63589af4085760f6349a7386a6 (patch) | |
tree | 1c9597cab97efe57a3447c1e060d5d0e8e96d893 | |
parent | 07a8538d90763f0ae640dea822bdeb63ea17ec44 (diff) | |
download | gcc-d74b0c698c8feb63589af4085760f6349a7386a6.zip gcc-d74b0c698c8feb63589af4085760f6349a7386a6.tar.gz gcc-d74b0c698c8feb63589af4085760f6349a7386a6.tar.bz2 |
aarch64: Add support for mfloat8x{8|16}_t types
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc
(aarch64_init_simd_builtin_types): Initialise FP8 simd types.
* config/aarch64/aarch64-builtins.h
(enum aarch64_type_qualifiers): Add qualifier_modal_float bit.
* config/aarch64/aarch64-simd-builtin-types.def:
Add Mfloat8x{8|16}_t types.
* config/aarch64/arm_neon.h: Add mfloat8x{8|16}_t typedefs.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/movv16qi_2.c: Test mfloat as well.
* gcc.target/aarch64/movv16qi_3.c: Ditto.
* gcc.target/aarch64/movv2x16qi_1.c: Ditto.
* gcc.target/aarch64/movv3x16qi_1.c: Ditto.
* gcc.target/aarch64/movv4x16qi_1.c: Ditto.
* gcc.target/aarch64/movv8qi_2.c: Ditto.
* gcc.target/aarch64/movv8qi_3.c: Ditto.
* gcc.target/aarch64/mfloat-init-1.c: New test.
-rw-r--r-- | gcc/config/aarch64/aarch64-builtins.cc | 4 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64-builtins.h | 2 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64-simd-builtin-types.def | 2 | ||||
-rw-r--r-- | gcc/config/aarch64/arm_neon.h | 3 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/mfloat-init-1.c | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movv16qi_2.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movv16qi_3.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movv2x16qi_1.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movv3x16qi_1.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movv4x16qi_1.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movv8qi_2.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movv8qi_3.c | 1 |
12 files changed, 23 insertions, 0 deletions
diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index c488563..a41e37a 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -1220,6 +1220,10 @@ aarch64_init_simd_builtin_types (void) aarch64_simd_types[Bfloat16x4_t].eltype = bfloat16_type_node; aarch64_simd_types[Bfloat16x8_t].eltype = bfloat16_type_node; + /* Init FP8 element types. */ + aarch64_simd_types[Mfloat8x8_t].eltype = aarch64_mfp8_type_node; + aarch64_simd_types[Mfloat8x16_t].eltype = aarch64_mfp8_type_node; + for (i = 0; i < nelts; i++) { tree eltype = aarch64_simd_types[i].eltype; diff --git a/gcc/config/aarch64/aarch64-builtins.h b/gcc/config/aarch64/aarch64-builtins.h index e326fe6..00db7a7 100644 --- a/gcc/config/aarch64/aarch64-builtins.h +++ b/gcc/config/aarch64/aarch64-builtins.h @@ -54,6 +54,8 @@ enum aarch64_type_qualifiers /* Lane indices selected in quadtuplets. - must be in range, and flipped for bigendian. */ qualifier_lane_quadtup_index = 0x1000, + /* Modal FP types. */ + qualifier_modal_float = 0x2000, }; #define ENTRY(E, M, Q, G) E, diff --git a/gcc/config/aarch64/aarch64-simd-builtin-types.def b/gcc/config/aarch64/aarch64-simd-builtin-types.def index 6111cd0..83b2da2 100644 --- a/gcc/config/aarch64/aarch64-simd-builtin-types.def +++ b/gcc/config/aarch64/aarch64-simd-builtin-types.def @@ -52,3 +52,5 @@ ENTRY (Float64x2_t, V2DF, none, 13) ENTRY (Bfloat16x4_t, V4BF, none, 14) ENTRY (Bfloat16x8_t, V8BF, none, 14) + ENTRY (Mfloat8x8_t, V8QI, modal_float, 13) + ENTRY (Mfloat8x16_t, V16QI, modal_float, 14) diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index e376685..730d9d3 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -72,6 +72,9 @@ typedef __Poly16_t poly16_t; typedef __Poly64_t poly64_t; typedef __Poly128_t poly128_t; +typedef __Mfloat8x8_t mfloat8x8_t; +typedef __Mfloat8x16_t mfloat8x16_t; + typedef __fp16 float16_t; typedef float float32_t; typedef double float64_t; diff --git a/gcc/testsuite/gcc.target/aarch64/mfloat-init-1.c b/gcc/testsuite/gcc.target/aarch64/mfloat-init-1.c new file mode 100644 index 0000000..15a6b33 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/mfloat-init-1.c @@ -0,0 +1,5 @@ +/* { dg-do assemble } */ +/* { dg-options "-O --save-temps" } */ + +/* { dg-error "invalid conversion to type 'mfloat8_t" "" {target *-*-*} 0 } */ +__Mfloat8x8_t const_mf8x8 () { return (__Mfloat8x8_t) { 1, 1, 1, 1, 1, 1, 1, 1 }; } diff --git a/gcc/testsuite/gcc.target/aarch64/movv16qi_2.c b/gcc/testsuite/gcc.target/aarch64/movv16qi_2.c index 08a0a19..39a06db 100644 --- a/gcc/testsuite/gcc.target/aarch64/movv16qi_2.c +++ b/gcc/testsuite/gcc.target/aarch64/movv16qi_2.c @@ -17,6 +17,7 @@ TEST_GENERAL (__Bfloat16x8_t) TEST_GENERAL (__Float16x8_t) TEST_GENERAL (__Float32x4_t) TEST_GENERAL (__Float64x2_t) +TEST_GENERAL (__Mfloat8x16_t) __Int8x16_t const_s8x8 () { return (__Int8x16_t) { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; } __Int16x8_t const_s16x4 () { return (__Int16x8_t) { 1, 0, 1, 0, 1, 0, 1, 0 }; } diff --git a/gcc/testsuite/gcc.target/aarch64/movv16qi_3.c b/gcc/testsuite/gcc.target/aarch64/movv16qi_3.c index d43b994..082e95c 100644 --- a/gcc/testsuite/gcc.target/aarch64/movv16qi_3.c +++ b/gcc/testsuite/gcc.target/aarch64/movv16qi_3.c @@ -22,6 +22,7 @@ TEST_VECTOR (__Bfloat16x8_t) TEST_VECTOR (__Float16x8_t) TEST_VECTOR (__Float32x4_t) TEST_VECTOR (__Float64x2_t) +TEST_VECTOR (__Mfloat8x16_t) /* ** test___Int8x16_t: diff --git a/gcc/testsuite/gcc.target/aarch64/movv2x16qi_1.c b/gcc/testsuite/gcc.target/aarch64/movv2x16qi_1.c index 90e3b42..5aeb975 100644 --- a/gcc/testsuite/gcc.target/aarch64/movv2x16qi_1.c +++ b/gcc/testsuite/gcc.target/aarch64/movv2x16qi_1.c @@ -19,6 +19,7 @@ TEST_VECTOR (float16x8x2_t) TEST_VECTOR (bfloat16x8x2_t) TEST_VECTOR (float32x4x2_t) TEST_VECTOR (float64x2x2_t) +TEST_VECTOR (mfloat8x16x2_t) /* ** mov_int8x16x2_t: diff --git a/gcc/testsuite/gcc.target/aarch64/movv3x16qi_1.c b/gcc/testsuite/gcc.target/aarch64/movv3x16qi_1.c index 070a596..4c6f24f 100644 --- a/gcc/testsuite/gcc.target/aarch64/movv3x16qi_1.c +++ b/gcc/testsuite/gcc.target/aarch64/movv3x16qi_1.c @@ -19,6 +19,7 @@ TEST_VECTOR (float16x8x3_t) TEST_VECTOR (bfloat16x8x3_t) TEST_VECTOR (float32x4x3_t) TEST_VECTOR (float64x2x3_t) +TEST_VECTOR (mfloat8x16x3_t) /* ** mov_int8x16x3_t: diff --git a/gcc/testsuite/gcc.target/aarch64/movv4x16qi_1.c b/gcc/testsuite/gcc.target/aarch64/movv4x16qi_1.c index 6a517b4..7e5dd86 100644 --- a/gcc/testsuite/gcc.target/aarch64/movv4x16qi_1.c +++ b/gcc/testsuite/gcc.target/aarch64/movv4x16qi_1.c @@ -19,6 +19,7 @@ TEST_VECTOR (float16x8x4_t) TEST_VECTOR (bfloat16x8x4_t) TEST_VECTOR (float32x4x4_t) TEST_VECTOR (float64x2x4_t) +TEST_VECTOR (mfloat8x16x4_t) /* ** mov_int8x16x4_t: diff --git a/gcc/testsuite/gcc.target/aarch64/movv8qi_2.c b/gcc/testsuite/gcc.target/aarch64/movv8qi_2.c index 0d8576f..27c6044 100644 --- a/gcc/testsuite/gcc.target/aarch64/movv8qi_2.c +++ b/gcc/testsuite/gcc.target/aarch64/movv8qi_2.c @@ -17,6 +17,7 @@ TEST_GENERAL (__Bfloat16x4_t) TEST_GENERAL (__Float16x4_t) TEST_GENERAL (__Float32x2_t) TEST_GENERAL (__Float64x1_t) +TEST_GENERAL (__Mfloat8x8_t) __Int8x8_t const_s8x8 () { return (__Int8x8_t) { 1, 1, 1, 1, 1, 1, 1, 1 }; } __Int16x4_t const_s16x4 () { return (__Int16x4_t) { 1, 0, 1, 0 }; } diff --git a/gcc/testsuite/gcc.target/aarch64/movv8qi_3.c b/gcc/testsuite/gcc.target/aarch64/movv8qi_3.c index 1caa1a7..a213a0f 100644 --- a/gcc/testsuite/gcc.target/aarch64/movv8qi_3.c +++ b/gcc/testsuite/gcc.target/aarch64/movv8qi_3.c @@ -22,6 +22,7 @@ TEST_VECTOR (__Bfloat16x4_t) TEST_VECTOR (__Float16x4_t) TEST_VECTOR (__Float32x2_t) TEST_VECTOR (__Float64x1_t) +TEST_VECTOR (__Mfloat8x8_t) /* ** test___Int8x8_t: |