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author | Ilya Leoshkevich <iii@linux.ibm.com> | 2018-11-05 16:34:32 +0000 |
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committer | Ilya Leoshkevich <iii@gcc.gnu.org> | 2018-11-05 16:34:32 +0000 |
commit | d64d068c6ae391ccb1502dd3bed865fe57e9f4e4 (patch) | |
tree | 9b74d356c97e739f09dda5b1ba6ad6b148a39af8 | |
parent | 733441e2e1d207a1ab0a4a255dea03ee7c6c8774 (diff) | |
download | gcc-d64d068c6ae391ccb1502dd3bed865fe57e9f4e4.zip gcc-d64d068c6ae391ccb1502dd3bed865fe57e9f4e4.tar.gz gcc-d64d068c6ae391ccb1502dd3bed865fe57e9f4e4.tar.bz2 |
S/390: Make tests expect column numbers in RTL output
RTL output now includes column numbers in addition to line numbers,
like this:
"gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c":16:1
This confuses some S/390 tests.
gcc/testsuite/ChangeLog:
2018-11-05 Ilya Leoshkevich <iii@linux.ibm.com>
* gcc.target/s390/md/andc-splitter-1.c: Add colon to
expectations.
* gcc.target/s390/md/andc-splitter-2.c: Likewise.
* gcc.target/s390/md/setmem_long-1.c: Likewise.
From-SVN: r265813
-rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c | 16 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c | 16 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/s390/md/setmem_long-1.c | 4 |
4 files changed, 25 insertions, 18 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9001057..665c049 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2018-11-05 Ilya Leoshkevich <iii@linux.ibm.com> + + * gcc.target/s390/md/andc-splitter-1.c: Add colon to + expectations. + * gcc.target/s390/md/andc-splitter-2.c: Likewise. + * gcc.target/s390/md/setmem_long-1.c: Likewise. + 2018-11-05 Richard Biener <rguenther@suse.de> PR tree-optimization/87873 diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c index 3f0677c..36f2cfc 100644 --- a/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c @@ -14,26 +14,26 @@ __attribute__ ((noinline)) unsigned long andc_vv(unsigned long a, unsigned long b) { return ~b & a; } -/* { dg-final { scan-assembler ":16 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":16 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*xordi3\}" } } */ __attribute__ ((noinline)) unsigned long andc_pv(unsigned long *a, unsigned long b) { return ~b & *a; } -/* { dg-final { scan-assembler ":22 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":22 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*xordi3\}" } } */ __attribute__ ((noinline)) unsigned long andc_vp(unsigned long a, unsigned long *b) { return ~*b & a; } -/* { dg-final { scan-assembler ":28 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":28 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*xordi3\}" } } */ __attribute__ ((noinline)) unsigned long andc_pp(unsigned long *a, unsigned long *b) { return ~*b & *a; } -/* { dg-final { scan-assembler ":34 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":34 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*xordi3\}" } } */ /* { dg-final { scan-assembler-times "\tngr\?k\?\t" 4 } } */ /* { dg-final { scan-assembler-times "\txgr\?\t" 4 } } */ diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c index 89c8ea2..75ab75b 100644 --- a/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c @@ -14,26 +14,26 @@ __attribute__ ((noinline)) unsigned int andc_vv(unsigned int a, unsigned int b) { return ~b & a; } -/* { dg-final { scan-assembler ":16 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":16 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*xorsi3\}" } } */ __attribute__ ((noinline)) unsigned int andc_pv(unsigned int *a, unsigned int b) { return ~b & *a; } -/* { dg-final { scan-assembler ":22 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":22 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*xorsi3\}" } } */ __attribute__ ((noinline)) unsigned int andc_vp(unsigned int a, unsigned int *b) { return ~*b & a; } -/* { dg-final { scan-assembler ":28 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":28 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*xorsi3\}" } } */ __attribute__ ((noinline)) unsigned int andc_pp(unsigned int *a, unsigned int *b) { return ~*b & *a; } -/* { dg-final { scan-assembler ":34 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":34 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*xorsi3\}" } } */ /* { dg-final { scan-assembler-times "\tnr\?k\?\t" 4 } } */ /* { dg-final { scan-assembler-times "\txr\?k\?\t" 4 } } */ diff --git a/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c index dec7197..a1d1c11 100644 --- a/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c +++ b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c @@ -23,8 +23,8 @@ void test2(char *p, int c, int len) } /* Check that the right patterns are used. */ -/* { dg-final { scan-assembler-times {c"?:16 .*{[*]setmem_long_?3?1?z?}} 1 } } */ -/* { dg-final { scan-assembler-times {c"?:22 .*{[*]setmem_long_and_?3?1?z?}} 1 } } */ +/* { dg-final { scan-assembler-times {c"?:16:.*{[*]setmem_long_?3?1?z?}} 1 } } */ +/* { dg-final { scan-assembler-times {c"?:22:.*{[*]setmem_long_and_?3?1?z?}} 1 } } */ #define LEN 500 char buf[LEN + 2]; |