Daily bump.

13 files changed, 596 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6724048..323e6ad 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,224 @@
+2023-12-11  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* recog.cc (constrain_operands): Pass VOIDmode to
+	strict_memory_address_p for 'p' constraints in asms.
+	* rtl-ssa/changes.cc (recog_level2): Skip redundant constrain_operands
+	for asms.
+
+2023-12-11  Jason Merrill  <jason@redhat.com>
+
+	* common.opt: Add comment.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	PR middle-end/112784
+	* expr.cc (emit_block_move_via_loop): Call int_mode_for_size
+	for maybe-too-wide sizes.
+	(emit_block_cmp_via_loop): Likewise.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	PR target/112778
+	* builtins.cc (can_store_by_multiple_pieces): New.
+	(try_store_by_multiple_pieces): Call it.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	PR target/112804
+	* builtins.cc (try_store_by_multiple_pieces): Use ptr's mode
+	for the increment.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	* doc/invoke.texi (multiflags): Add period after @xref to
+	silence warning.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	* config/rl78/rl78.cc (TARGET_HAVE_STRUB_SUPPORT_FOR): Disable.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	* ipa-strub.cc (pass_ipa_strub::execute): Check that we don't
+	add indirection to pointer parameters, and document attribute
+	access non-interactions.
+
+2023-12-11  Roger Sayle  <roger@nextmovesoftware.com>
+
+	PR rtl-optimization/112380
+	* combine.cc (expand_field_assignment): Check if gen_lowpart
+	returned a CLOBBER, and avoid calling gen_simplify_binary with
+	it if so.
+
+2023-12-11  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	PR target/111867
+	* config/aarch64/aarch64.cc (aarch64_float_const_representable_p): For BFmode,
+	only accept +0.0.
+
+2023-12-11  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	PR tree-optimization/111972
+	PR tree-optimization/110637
+	* match.pd (`(convert)(zeroone !=/== CST)`): Match
+	and simplify to ((convert)zeroone){,^1}.
+	* fold-const.cc (fold_binary_loc): Remove
+	transformation of `(~a) & 1` and `(a ^ 1) & 1`
+	into `(convert)(a == 0)`.
+
+2023-12-11  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	PR middle-end/112935
+	* expr.cc (expand_expr_real_2): Use
+	gimple_zero_one_valued_p instead of tree_nonzero_bits
+	to find boolean defined expressions.
+
+2023-12-11  Mikael Pettersson  <mikpelinux@gmail.com>
+
+	PR target/112413
+	* config/m68k/linux.h (ASM_RETURN_CASE_JUMP): For
+	TARGET_LONG_JUMP_TABLE_OFFSETS, reference the jump table
+	via its label.
+	* config/m68k/m68kelf.h (ASM_RETURN_CASE_JUMP): Likewise.
+	* config/m68k/netbsd-elf.h (ASM_RETURN_CASE_JUMP): Likewise.
+
+2023-12-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* config/aarch64/aarch64.cc (lane_size): New function.
+	(aarch64_simd_clone_compute_vecsize_and_simdlen): Determine simdlen according to NDS rule
+	and reject combination of simdlen and types that lead to vectors larger than 128bits.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* rtl-ssa/insns.cc (function_info::record_use): Add !ordered_p case.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-v.cc (get_gather_index_mode): New function.
+	(shuffle_series_patterns): Robostify shuffle index.
+	(shuffle_generic_patterns): Ditto.
+
+2023-12-11  Victor Do Nascimento  <victor.donascimento@arm.com>
+
+	* config/aarch64/arm_neon.h (vldap1_lane_u64): Add
+	`const' to `__builtin_aarch64_simd_di *' cast.
+	(vldap1q_lane_u64): Likewise.
+	(vldap1_lane_s64): Cast __src to `const __builtin_aarch64_simd_di *'.
+	(vldap1q_lane_s64): Likewise.
+	(vldap1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
+	(vldap1q_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
+	(vldap1_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast.
+	(vldap1q_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast.
+	(vstl1_lane_u64): remove stray `const'.
+	(vstl1_lane_s64): Cast __src to `__builtin_aarch64_simd_di *'.
+	(vstl1q_lane_s64): Likewise.
+	(vstl1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
+	(vstl1q_lane_f64): Likewise.
+
+2023-12-11  Robin Dapp  <rdapp@ventanamicro.com>
+
+	PR target/112853
+	* config/riscv/riscv-v.cc (expand_const_vector):  Fix step
+	calculation.
+	(modulo_sel_indices): Also perform modulo for variable-length
+	constants.
+	(shuffle_series): Recognize series permutations.
+	(expand_vec_perm_const_1): Add shuffle_series.
+
+2023-12-11  liuhongt  <hongtao.liu@intel.com>
+
+	* match.pd (VCE (a cmp b ? -1 : 0) < 0) ? c : d ---> (VCE ((a
+	cmp b) ? (VCE:c) : (VCE:d))): New gimple simplication.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	PR target/112431
+	* config/riscv/vector.md: Support highest overlap for wv instructions.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-vsetvl.cc (extract_single_source): Fix ICE.
+
+2023-12-11  Jakub Jelinek  <jakub@redhat.com>
+
+	* doc/extend.texi (__sync_fetch_and_add, __sync_fetch_and_sub,
+	__sync_fetch_and_or, __sync_fetch_and_and, __sync_fetch_and_xor,
+	__sync_fetch_and_nand, __sync_add_and_fetch, __sync_sub_and_fetch,
+	__sync_or_and_fetch, __sync_and_and_fetch, __sync_xor_and_fetch,
+	__sync_nand_and_fetch, __sync_bool_compare_and_swap,
+	__sync_val_compare_and_swap, __sync_lock_test_and_set,
+	__sync_lock_release, __atomic_load_n, __atomic_load, __atomic_store_n,
+	__atomic_store, __atomic_exchange_n, __atomic_exchange,
+	__atomic_compare_exchange_n, __atomic_compare_exchange,
+	__atomic_add_fetch, __atomic_sub_fetch, __atomic_and_fetch,
+	__atomic_xor_fetch, __atomic_or_fetch, __atomic_nand_fetch,
+	__atomic_fetch_add, __atomic_fetch_sub, __atomic_fetch_and,
+	__atomic_fetch_xor, __atomic_fetch_or, __atomic_fetch_nand,
+	__atomic_test_and_set, __atomic_clear, __atomic_thread_fence,
+	__atomic_signal_fence, __atomic_always_lock_free,
+	__atomic_is_lock_free, __builtin_add_overflow,
+	__builtin_sadd_overflow, __builtin_saddl_overflow,
+	__builtin_saddll_overflow, __builtin_uadd_overflow,
+	__builtin_uaddl_overflow, __builtin_uaddll_overflow,
+	__builtin_sub_overflow, __builtin_ssub_overflow,
+	__builtin_ssubl_overflow, __builtin_ssubll_overflow,
+	__builtin_usub_overflow, __builtin_usubl_overflow,
+	__builtin_usubll_overflow, __builtin_mul_overflow,
+	__builtin_smul_overflow, __builtin_smull_overflow,
+	__builtin_smulll_overflow, __builtin_umul_overflow,
+	__builtin_umull_overflow, __builtin_umulll_overflow,
+	__builtin_add_overflow_p, __builtin_sub_overflow_p,
+	__builtin_mul_overflow_p, __builtin_addc, __builtin_addcl,
+	__builtin_addcll, __builtin_subc, __builtin_subcl, __builtin_subcll,
+	__builtin_alloca, __builtin_alloca_with_align,
+	__builtin_alloca_with_align_and_max, __builtin_speculation_safe_value,
+	__builtin_nan, __builtin_nand32, __builtin_nand64, __builtin_nand128,
+	__builtin_nanf, __builtin_nanl, __builtin_nanf@var{n},
+	__builtin_nanf@var{n}x, __builtin_nans, __builtin_nansd32,
+	__builtin_nansd64, __builtin_nansd128, __builtin_nansf,
+	__builtin_nansl, __builtin_nansf@var{n}, __builtin_nansf@var{n}x,
+	__builtin_ffs, __builtin_clz, __builtin_ctz, __builtin_clrsb,
+	__builtin_popcount, __builtin_parity, __builtin_bswap16,
+	__builtin_bswap32, __builtin_bswap64, __builtin_bswap128,
+	__builtin_extend_pointer, __builtin_goacc_parlevel_id,
+	__builtin_goacc_parlevel_size, vec_clrl, vec_clrr, vec_mulh, vec_mul,
+	vec_div, vec_dive, vec_mod, __builtin_rx_mvtc): Use @var{...} around
+	parameter names.
+	(vec_rl, vec_sl, vec_sr, vec_sra): Likewise.  Use @var{...} also
+	around A, B and R in description.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-selftests.cc (riscv_run_selftests):
+	Remove poly self test when FIXED-VLMAX.
+
+2023-12-11  Fei Gao  <gaofei@eswincomputing.com>
+	    Xiao Zeng <zengxiao@eswincomputing.com>
+
+	* ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for AND.
+	(noce_bbs_ok_for_cond_zero_arith): Likewise.
+	(noce_try_cond_zero_arith): Likewise.
+
+2023-12-11  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/112904
+	* config/i386/mmx.md (*xop_pcmov_<mode>): New define_insn.
+
+2023-12-11  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	PR target/112707
+	* config/rs6000/rs6000.h (TARGET_FCTID): Define.
+	* config/rs6000/rs6000.md (lrint<mode>di2): Add guard TARGET_FCTID.
+	* (lround<mode>di2): Replace TARGET_FPRND with TARGET_FCTID.
+
+2023-12-11  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	PR target/112707
+	* config/rs6000/rs6000.md (expand lrint<mode>si2): New.
+	(insn lrint<mode>si2): Rename to...
+	(*lrint<mode>si): ...this.
+	(lrint<mode>si_di): New.
+
 2023-12-10  Fei Gao  <gaofei@eswincomputing.com>
 	    Xiao Zeng <zengxiao@eswincomputing.com>
 
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 6a5191b..190b92f 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20231211
+20231212
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 48a5bb7..22d2461 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,8 @@
+2023-12-11  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* terminals.c [__FreeBSD__]: Include <libutil.h>.
+	(TABDLY): Only define if missing.
+
 2023-12-06  Alexandre Oliva  <oliva@adacore.com>
 
 	* gcc-interface/trans.cc: Include ipa-strub.h.
diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog
index cf056de..7f62965 100644
--- a/gcc/analyzer/ChangeLog
+++ b/gcc/analyzer/ChangeLog
@@ -1,3 +1,14 @@
+2023-12-11  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/112955
+	* engine.cc (feasibility_state::feasibility_state): Initialize
+	m_snodes_visited.
+
+2023-12-11  Andrew Pinski  <apinski@marvell.com>
+
+	* region-model-manager.cc (maybe_undo_optimize_bit_field_compare): Remove
+	the check for type being unsigned_char_type_node.
+
 2023-12-08  David Malcolm  <dmalcolm@redhat.com>
 
 	* sm-taint.cc (taint_state_machine::alt_get_inherited_state): Fix
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index f617577..a96e65b 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,18 @@
+2023-12-11  Martin Uecker  <uecker@tugraz.at>
+
+	PR c/112488
+	* c-decl.cc (add_decl_expr): Revise.
+	(finish_struct): Create DECL_EXPR.
+	* c-parser.cc (c_parser_struct_or_union_specifier): Call
+	finish_struct with expression for VLA sizes.
+	* c-tree.h (finish_struct): Add argument.
+
+2023-12-11  Tobias Burnus  <tobias@codesourcery.com>
+
+	* c-parser.cc (c_parser_omp_requires): Handle acquires/release
+	in atomic_default_mem_order clause.
+	(c_parser_omp_atomic): Update.
+
 2023-12-05  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* c-decl.cc (std_attribute_table): Add extra braces to work
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index d493135..5608913 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,31 @@
+2023-12-11  Patrick Palka  <ppalka@redhat.com>
+
+	* pt.cc (alias_ctad_tweaks): Pass use_spec_table=false to
+	tsubst_decl.
+
+2023-12-11  Tobias Burnus  <tobias@codesourcery.com>
+
+	* parser.cc (cp_parser_omp_requires): Handle acquires/release
+	in atomic_default_mem_order clause.
+	(cp_parser_omp_atomic): Update.
+
+2023-12-11  Nathaniel Shead  <nathanieloshead@gmail.com>
+
+	PR c++/96090
+	PR c++/100470
+	* call.cc (build_over_call): Prevent folding of trivial special
+	members when checking for noexcept.
+	* method.cc (constructible_expr): Perform value-initialisation
+	for empty parameter lists.
+	(is_nothrow_xible): Treat as noexcept operator.
+
+2023-12-11  Nathaniel Shead  <nathanieloshead@gmail.com>
+
+	PR c++/104234
+	PR c++/112580
+	* pt.cc (tsubst_template_decl): Clear
+	DECL_UNINSTANTIATED_TEMPLATE_FRIEND_P.
+
 2023-12-10  Ken Matsui  <kmatsui@gcc.gnu.org>
 
 	* cp-trait.def: Define __remove_pointer.
diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog
index b002b45..f07ec46 100644
--- a/gcc/d/ChangeLog
+++ b/gcc/d/ChangeLog
@@ -1,3 +1,13 @@
+2023-12-11  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	* Make-lang.in (D_FRONTEND_OBJS): Rename d/common-string.o to
+	d/common-smallbuffer.o.
+	* dmd/MERGE: Merge upstream dmd 2bbf64907c.
+	* dmd/VERSION: Bump version to v2.106.0.
+	* modules.cc (layout_moduleinfo_fields): Update for new front-end
+	interface.
+	(layout_moduleinfo): Likewise.
+
 2023-12-05  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* d-attribs.cc (d_langhook_common_attribute_table): Add extra braces
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index daab6e2..0a1eae4 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,25 @@
+2023-12-11  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* trans-openmp.cc (gfc_omp_call_is_alloc): Resolve ICE.
+
+2023-12-11  Tobias Burnus  <tobias@codesourcery.com>
+
+	* gfortran.h (enum gfc_omp_requires_kind): Add
+	OMP_REQ_ATOMIC_MEM_ORDER_ACQUIRE and OMP_REQ_ATOMIC_MEM_ORDER_RELEASE.
+	(gfc_namespace): Add a 7th bit to omp_requires.
+	* module.cc (enum ab_attribute): Add AB_OMP_REQ_MEM_ORDER_ACQUIRE
+	and AB_OMP_REQ_MEM_ORDER_RELEASE
+	(mio_symbol_attribute): Handle it.
+	* openmp.cc (gfc_omp_requires_add_clause): Update for acquire/release.
+	(gfc_match_omp_requires): Likewise.
+	(gfc_match_omp_atomic): Handle them for atomic_default_mem_order.
+	* parse.cc: Likewise.
+
+2023-12-11  Tobias Burnus  <tobias@codesourcery.com>
+
+	* trans-openmp.cc (gfc_omp_call_add_alloc,
+	gfc_omp_call_is_alloc): Set 'fn spec'.
+
 2023-12-10  Harald Anlauf  <anlauf@gmx.de>
 
 	PR fortran/111503
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 36db275..d762254 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,216 @@
+2023-12-11  Jakub Jelinek  <jakub@redhat.com>
+
+	* c-c++-common/strub-O2fni.c: Add -fno-stack-protector to dg-options.
+	* c-c++-common/strub-O3fni.c: Likewise.
+	* c-c++-common/strub-Os.c: Likewise.
+	* c-c++-common/strub-Og.c: Likewise.
+
+2023-12-11  Martin Uecker  <uecker@tugraz.at>
+
+	PR c/112488
+	* gcc.dg/pr112488-1.c: New test.
+	* gcc.dg/pr112488-2.c: New test.
+	* gcc.dg/pr112898.c: New test.
+	* gcc.misc-tests/gcov-pr85350.c: Adapt.
+
+2023-12-11  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/prfm_imm_offset_2.c: New test.
+
+2023-12-11  Jason Merrill  <jason@redhat.com>
+
+	* g++.dg/cpp2a/concepts-explicit-inst1.C: Specify ABI v18.
+	* g++.dg/cpp2a/concepts-explicit-inst1a.C: New test.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	PR middle-end/112784
+	* gcc.target/i386/avx512cd-inline-stringops-pr112784.c: New.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	PR target/112778
+	* gcc.dg/inline-mem-cmp-pr112778.c: New.
+
+2023-12-11  Alexandre Oliva  <oliva@adacore.com>
+
+	PR target/112804
+	* gcc.target/aarch64/inline-mem-set-pr112804.c: New.
+
+2023-12-11  Roger Sayle  <roger@nextmovesoftware.com>
+
+	PR rtl-optimization/112380
+	* gcc.dg/pr112380.c: New test case.
+
+2023-12-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+
+	PR testsuite/112297
+	* gcc.target/i386/pr100936.c: Require nonpic target.
+
+2023-12-11  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/63378
+	* g++.dg/template/fnspec3.C: New test.
+
+2023-12-11  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	* gcc.dg/tree-ssa/pr110637-1.c: New test.
+	* gcc.dg/tree-ssa/pr110637-2.c: New test.
+	* gcc.dg/tree-ssa/pr110637-3.c: New test.
+	* gcc.dg/tree-ssa/pr111972-1.c: New test.
+	* gcc.dg/tree-ssa/pr69270.c: Update testcase.
+	* gcc.target/i386/pr110790-2.c: Update testcase.
+	* gcc.dg/fold-even-1.c: Removed.
+
+2023-12-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* lib/target-supports.exp: Add aarch64 targets to vect_simd_clones.
+	* c-c++-common/gomp/declare-variant-14.c: Adapt test for aarch64.
+	* c-c++-common/gomp/pr60823-1.c: Likewise.
+	* c-c++-common/gomp/pr60823-2.c: Likewise.
+	* c-c++-common/gomp/pr60823-3.c: Likewise.
+	* g++.dg/gomp/attrs-10.C: Likewise.
+	* g++.dg/gomp/declare-simd-1.C: Likewise.
+	* g++.dg/gomp/declare-simd-3.C: Likewise.
+	* g++.dg/gomp/declare-simd-4.C: Likewise.
+	* g++.dg/gomp/declare-simd-7.C: Likewise.
+	* g++.dg/gomp/declare-simd-8.C: Likewise.
+	* g++.dg/gomp/pr88182.C: Likewise.
+	* gcc.dg/declare-simd.c: Likewise.
+	* gcc.dg/gomp/declare-simd-1.c: Likewise.
+	* gcc.dg/gomp/declare-simd-3.c: Likewise.
+	* gcc.dg/gomp/pr87887-1.c: Likewise.
+	* gcc.dg/gomp/pr87895-1.c: Likewise.
+	* gcc.dg/gomp/pr89246-1.c: Likewise.
+	* gcc.dg/gomp/pr99542.c: Likewise.
+	* gcc.dg/gomp/simd-clones-2.c: Likewise.
+	* gcc.dg/vect/vect-simd-clone-1.c: Likewise.
+	* gcc.dg/vect/vect-simd-clone-2.c: Likewise.
+	* gcc.dg/vect/vect-simd-clone-4.c: Likewise.
+	* gcc.dg/vect/vect-simd-clone-5.c: Likewise.
+	* gcc.dg/vect/vect-simd-clone-6.c: Likewise.
+	* gcc.dg/vect/vect-simd-clone-7.c: Likewise.
+	* gcc.dg/vect/vect-simd-clone-8.c: Likewise.
+	* gfortran.dg/gomp/declare-simd-2.f90: Likewise.
+	* gfortran.dg/gomp/declare-simd-coarray-lib.f90: Likewise.
+	* gfortran.dg/gomp/declare-variant-14.f90: Likewise.
+	* gfortran.dg/gomp/pr79154-1.f90: Likewise.
+	* gfortran.dg/gomp/pr83977.f90: Likewise.
+	* gcc.target/aarch64/declare-simd-1.c: New file.
+	* gcc.target/aarch64/declare-simd-2.c: New file.
+
+2023-12-11  Patrick Palka  <ppalka@redhat.com>
+
+	* g++.dg/modules/concept-8.h: New test.
+	* g++.dg/modules/concept-8_a.H: New test.
+	* g++.dg/modules/concept-8_b.C: New test.
+
+2023-12-11  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c: Adjust test
+	expectation and target selector.
+	* gcc.target/riscv/rvv/autovec/builtin/strlen-run.c: Adjust
+	target selector.
+	* gcc.target/riscv/rvv/autovec/builtin/strncmp-run.c: Ditto.
+
+2023-12-11  Tobias Burnus  <tobias@codesourcery.com>
+
+	* c-c++-common/gomp/requires-3.c: Update for now valid code.
+	* gfortran.dg/gomp/requires-3.f90: Likewise.
+	* gfortran.dg/gomp/requires-2.f90: Update dg-error.
+	* gfortran.dg/gomp/requires-5.f90: Likewise.
+	* c-c++-common/gomp/requires-5.c: New test.
+	* c-c++-common/gomp/requires-6.c: New test.
+	* c-c++-common/gomp/requires-7.c: New test.
+	* c-c++-common/gomp/requires-8.c: New test.
+	* gfortran.dg/gomp/requires-10.f90: New test.
+	* gfortran.dg/gomp/requires-11.f90: New test.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c: New test.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/pr110950.c: Adapt test.
+
+2023-12-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+
+	* c-c++-common/asan/memcmp-1.c: Adjust pattern on darwin.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/vsetvl/avl_use_bug-1.c: Moved to...
+	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c: ...here.
+
+2023-12-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+
+	* gcc.target/i386/pr112445.c: Require dfp.
+
+2023-12-11  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/avx512vl-blendv-3.c: New test.
+	* gcc.target/i386/blendv-3.c: New test.
+
+2023-12-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+
+	* gcc.target/i386/libcall-1.c: Skip on darwin.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	PR target/112431
+	* gcc.target/riscv/rvv/base/pr112431-39.c: New test.
+	* gcc.target/riscv/rvv/base/pr112431-40.c: New test.
+	* gcc.target/riscv/rvv/base/pr112431-41.c: New test.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/vsetvl/avl_use_bug-1.c: New test.
+
+2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/base/poly-selftest-1.c: New test.
+
+2023-12-11  Fei Gao  <gaofei@eswincomputing.com>
+	    Xiao Zeng <zengxiao@eswincomputing.com>
+
+	* gcc.target/riscv/zicond_ifcvt_opt.c: Add TCs for AND.
+
+2023-12-11  Nathaniel Shead  <nathanieloshead@gmail.com>
+
+	PR c++/96090
+	PR c++/100470
+	* g++.dg/cpp0x/noexcept81.C: New test.
+	* g++.dg/ext/is_nothrow_constructible7.C: New test.
+	* g++.dg/ext/is_nothrow_constructible8.C: New test.
+
+2023-12-11  Nathaniel Shead  <nathanieloshead@gmail.com>
+
+	PR c++/104234
+	PR c++/112580
+	* g++.dg/modules/pr104234.C: New test.
+
+2023-12-11  liuhongt  <hongtao.liu@intel.com>
+
+	* g++.target/i386/pr112904.C: New test.
+
+2023-12-11  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	PR target/112707
+	* gcc.target/powerpc/pr112707.h: New.
+	* gcc.target/powerpc/pr112707-2.c: New.
+	* gcc.target/powerpc/pr112707-3.c: New.
+	* gcc.target/powerpc/pr88558-p7.c: Check fctid on ilp32 and
+	has_arch_ppc64 as it's now guarded by powerpc64.
+	* gcc.target/powerpc/pr88558-p8.c: Likewise.
+	* gfortran.dg/nint_p7.f90: Add powerpc64 target requirement as
+	lround<mode>di2 is now guarded by powerpc64.
+
+2023-12-11  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	PR target/112707
+	* gcc.target/powerpc/pr112707-1.c: New.
+
 2023-12-10  Fei Gao  <gaofei@eswincomputing.com>
 	    Xiao Zeng <zengxiao@eswincomputing.com>
 
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 279d718..0248ac3 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,13 @@
+2023-12-11  Lipeng Zhu  <lipeng.zhu@intel.com>
+
+	* gthr-posix.h (__GTHREAD_RWLOCK_INIT): New macro.
+	(__gthrw): New function.
+	(__gthread_rwlock_rdlock): New function.
+	(__gthread_rwlock_tryrdlock): New function.
+	(__gthread_rwlock_wrlock): New function.
+	(__gthread_rwlock_trywrlock): New function.
+	(__gthread_rwlock_unlock): New function.
+
 2023-12-08  Florian Weimer  <fweimer@redhat.com>
 
 	* libgcov-interface.c (__gcov_fork): Use __builtin_fork instead
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index 2393305..50c5fe8 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,43 @@
+2023-12-11  Lipeng Zhu  <lipeng.zhu@intel.com>
+
+	* io/async.c (DEBUG_LINE): New macro.
+	* io/async.h (RWLOCK_DEBUG_ADD): New macro.
+	(CHECK_RDLOCK): New macro.
+	(CHECK_WRLOCK): New macro.
+	(TAIL_RWLOCK_DEBUG_QUEUE): New macro.
+	(IN_RWLOCK_DEBUG_QUEUE): New macro.
+	(RDLOCK): New macro.
+	(WRLOCK): New macro.
+	(RWUNLOCK): New macro.
+	(RD_TO_WRLOCK): New macro.
+	(INTERN_RDLOCK): New macro.
+	(INTERN_WRLOCK): New macro.
+	(INTERN_RWUNLOCK): New macro.
+	* io/io.h (struct gfc_unit): Change UNIT_LOCK to UNIT_RWLOCK in
+	a comment.
+	(unit_lock): Remove including associated internal_proto.
+	(unit_rwlock): New declarations including associated internal_proto.
+	(dec_waiting_unlocked): Use WRLOCK and RWUNLOCK on unit_rwlock
+	instead of __gthread_mutex_lock and __gthread_mutex_unlock on
+	unit_lock.
+	* io/transfer.c (st_read_done_worker): Use WRLOCK and RWUNLOCK on
+	unit_rwlock instead of LOCK and UNLOCK on unit_lock.
+	(st_write_done_worker): Likewise.
+	* io/unit.c: Change UNIT_LOCK to UNIT_RWLOCK in 'IO locking rules'
+	comment. Use unit_rwlock variable instead of unit_lock variable.
+	(get_gfc_unit_from_unit_root): New function.
+	(get_gfc_unit): Use RDLOCK, WRLOCK and RWUNLOCK on unit_rwlock
+	instead of LOCK and UNLOCK on unit_lock.
+	(close_unit_1): Use WRLOCK and RWUNLOCK on unit_rwlock instead of
+	LOCK and UNLOCK on unit_lock.
+	(close_units): Likewise.
+	(newunit_alloc): Use RWUNLOCK on unit_rwlock instead of UNLOCK on
+	unit_lock.
+	* io/unix.c (find_file): Use RDLOCK and RWUNLOCK on unit_rwlock
+	instead of LOCK and UNLOCK on unit_lock.
+	(flush_all_units): Use WRLOCK and RWUNLOCK on unit_rwlock instead
+	of LOCK and UNLOCK on unit_lock.
+
 2023-12-05  Florian Weimer  <fweimer@redhat.com>
 	    Jakub Jelinek  <jakub@redhat.com>
 
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 77280e0..b22bd98 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,18 @@
+2023-12-11  Lipeng Zhu  <lipeng.zhu@intel.com>
+
+	* testsuite/libgomp.fortran/rwlock_1.f90: New file.
+	* testsuite/libgomp.fortran/rwlock_2.f90: New file.
+	* testsuite/libgomp.fortran/rwlock_3.f90: New file.
+
+2023-12-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* testsuite/libgomp.c/declare-variant-1.c: Adapt test for aarch64.
+	* testsuite/libgomp.fortran/declare-simd-1.f90: Likewise.
+
+2023-12-11  Tobias Burnus  <tobias@codesourcery.com>
+
+	* libgomp_g.h (GOMP_add_alloc, GOMP_is_alloc): Add.
+
 2023-12-08  Tobias Burnus  <tobias@codesourcery.com>
 
 	* allocator.c (struct fort_alloc_splay_tree_key_s,
diff --git a/libphobos/ChangeLog b/libphobos/ChangeLog
index 6f437e4..a98bd43 100644
--- a/libphobos/ChangeLog
+++ b/libphobos/ChangeLog
@@ -1,3 +1,8 @@
+2023-12-11  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	* libdruntime/MERGE: Merge upstream druntime 2bbf64907c.
+	* src/MERGE: Merge upstream phobos b64bfbf91.
+
 2023-11-21  Iain Buclaw  <ibuclaw@gdcproject.org>
 
 	* libdruntime/MERGE: Merge upstream druntime ff57fec515.