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| author | Richard Earnshaw <rearnsha@arm.com> | 2004-08-17 23:38:53 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2004-08-17 23:38:53 +0000 |
| commit | d56993f2920b9a9a5e71359cbdeae79966afae3d (patch) | |
| tree | 2d9e5f7b9dca5efcc6a90adb9dcd355bc753110a | |
| parent | 504c0e4f17ae32c0d14caa6b02098346ac98992d (diff) | |
| download | gcc-d56993f2920b9a9a5e71359cbdeae79966afae3d.zip gcc-d56993f2920b9a9a5e71359cbdeae79966afae3d.tar.gz gcc-d56993f2920b9a9a5e71359cbdeae79966afae3d.tar.bz2 | |
arm.md (addsi3, [...]): Rework to avoid use of preserve_subexpressions_p.
* arm.md (addsi3, subsi3, andsi3, iorsi3, movsi, movhi): Rework to
avoid use of preserve_subexpressions_p.
From-SVN: r86159
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 19 |
2 files changed, 12 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3e3252d..e8108e5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-08-18 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (addsi3, subsi3, andsi3, iorsi3, movsi, movhi): Rework to + avoid use of preserve_subexpressions_p. + 2004-08-17 Richard Henderson <rth@redhat.com> PR 17051 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 26ac278..351ce2b 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -449,7 +449,7 @@ { arm_split_constant (PLUS, SImode, NULL_RTX, INTVAL (operands[2]), operands[0], operands[1], - (no_new_pseudos ? 0 : preserve_subexpressions_p ())); + optimize && !no_new_pseudos); DONE; } " @@ -935,9 +935,7 @@ { arm_split_constant (MINUS, SImode, NULL_RTX, INTVAL (operands[1]), operands[0], - operands[2], - (no_new_pseudos ? 0 - : preserve_subexpressions_p ())); + operands[2], optimize && !no_new_pseudos); DONE; } else /* TARGET_THUMB */ @@ -1512,9 +1510,8 @@ { arm_split_constant (AND, SImode, NULL_RTX, INTVAL (operands[2]), operands[0], - operands[1], - (no_new_pseudos - ? 0 : preserve_subexpressions_p ())); + operands[1], optimize && !no_new_pseudos); + DONE; } } @@ -2167,8 +2164,7 @@ { arm_split_constant (IOR, SImode, NULL_RTX, INTVAL (operands[2]), operands[0], operands[1], - (no_new_pseudos - ? 0 : preserve_subexpressions_p ())); + optimize && !no_new_pseudos); DONE; } else /* TARGET_THUMB */ @@ -4256,8 +4252,7 @@ { arm_split_constant (SET, SImode, NULL_RTX, INTVAL (operands[1]), operands[0], NULL_RTX, - (no_new_pseudos ? 0 - : preserve_subexpressions_p ())); + optimize && !no_new_pseudos); DONE; } } @@ -4653,7 +4648,7 @@ emit_insn (gen_movsi (reg, GEN_INT (val))); operands[1] = gen_lowpart (HImode, reg); } - else if (arm_arch4 && !no_new_pseudos && optimize > 0 + else if (arm_arch4 && optimize && !no_new_pseudos && GET_CODE (operands[1]) == MEM) { rtx reg = gen_reg_rtx (SImode); |