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author | Joern Rennecke <joern.rennecke@embecosm.com> | 2013-05-09 20:11:12 +0000 |
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committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2013-05-09 21:11:12 +0100 |
commit | d4bca93ce12086ad0e1facbbe7c130078678d912 (patch) | |
tree | 40d4afaa4b15486285b85d286302d9c4d4f9322c | |
parent | 60ca9a652fcbed84a8a8f492850b7ea18b05c009 (diff) | |
download | gcc-d4bca93ce12086ad0e1facbbe7c130078678d912.zip gcc-d4bca93ce12086ad0e1facbbe7c130078678d912.tar.gz gcc-d4bca93ce12086ad0e1facbbe7c130078678d912.tar.bz2 |
epiphany.c (epiphany_expand_prologue): When using gen_stack_adjust_str with a register offset...
* config/epiphany/epiphany.c (epiphany_expand_prologue):
When using gen_stack_adjust_str with a register offset, add a
REG_FRAME_RELATED_EXPR note.
From-SVN: r198753
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/epiphany/epiphany.c | 22 |
2 files changed, 22 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eeb6f5f..fe4c00a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-05-09 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.c (epiphany_expand_prologue): + When using gen_stack_adjust_str with a register offset, add a + REG_FRAME_RELATED_EXPR note. + 2013-05-09 Uros Bizjak <ubizjak@gmail.com> * config/i386/sse.md (*vec_extractv4si_0_zext): New pattern. diff --git a/gcc/config/epiphany/epiphany.c b/gcc/config/epiphany/epiphany.c index 7d251e3..2807b3a 100644 --- a/gcc/config/epiphany/epiphany.c +++ b/gcc/config/epiphany/epiphany.c @@ -1734,18 +1734,28 @@ epiphany_expand_prologue (void) register save. */ if (current_frame_info.last_slot >= 0) { + rtx ip, mem2, insn, note; + gcc_assert (current_frame_info.last_slot != GPR_FP || (!current_frame_info.need_fp && current_frame_info.first_slot < 0)); off = GEN_INT (-current_frame_info.last_slot_offset); mem = gen_frame_mem (BLKmode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, off)); - reg = gen_rtx_REG (Pmode, GPR_IP); - frame_move_insn (reg, off); - frame_insn (gen_stack_adjust_str - (gen_frame_mem (word_mode, stack_pointer_rtx), - gen_rtx_REG (word_mode, current_frame_info.last_slot), - reg, mem)); + ip = gen_rtx_REG (Pmode, GPR_IP); + frame_move_insn (ip, off); + reg = gen_rtx_REG (word_mode, current_frame_info.last_slot), + mem2 = gen_frame_mem (word_mode, stack_pointer_rtx), + insn = frame_insn (gen_stack_adjust_str (mem2, reg, ip, mem)); + /* Instruction scheduling can separate the instruction setting IP from + INSN so that dwarf2out_frame_debug_expr becomes confused what the + temporary register is. Example: _gcov.o */ + note = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + gen_rtx_PLUS (Pmode, stack_pointer_rtx, off)); + note = gen_rtx_PARALLEL (VOIDmode, + gen_rtvec (2, gen_rtx_SET (VOIDmode, mem2, reg), + note)); + add_reg_note (insn, REG_FRAME_RELATED_EXPR, note); } /* If there is only one or no register to save, yet we have a large frame, use an add. */ |