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authorOleg Endo <olegendo@gcc.gnu.org>2015-02-17 21:08:24 +0000
committerOleg Endo <olegendo@gcc.gnu.org>2015-02-17 21:08:24 +0000
commitd420206ea581d85273f6d05280e658d3fdab604e (patch)
treef62223965634e9d640fb8c9d3249b7e1db59a390
parent1379ce8fafed69709dc33fb6dadf26711bdca913 (diff)
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re PR target/64793 ([SH] missed delay slot)
gcc/ PR target/64793 * config/sh/sh.md (cbranch define_delay): Set annulled true branch insn to nil. Adjust comments. gcc/testsuite/ PR target/64793 * gcc.target/sh/pr64793.c: New. * gcc.target/sh/pr51244-20-sh2a.c: Adjust expected cmp/gt insn count. From-SVN: r220772
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/sh/sh.md16
-rw-r--r--gcc/testsuite/ChangeLog6
-rw-r--r--gcc/testsuite/gcc.target/sh/pr51244-20-sh2a.c2
-rw-r--r--gcc/testsuite/gcc.target/sh/pr64793.c18
5 files changed, 34 insertions, 14 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9c0672b..754c373 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-02-17 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/64793
+ * config/sh/sh.md (cbranch define_delay): Set annulled true branch insn
+ to nil. Adjust comments.
+
2015-02-17 Jan Hubicka <hubicka@ucw.cz>
* ipa-visibility.c (function_and_variable_visibility): Only
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index fe372b1..94a01af 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -593,20 +593,10 @@
[(and (eq_attr "in_delay_slot" "yes")
(eq_attr "type" "!pstore,prget")) (nil) (nil)])
-;; Say that we have annulled true branches, since this gives smaller and
-;; faster code when branches are predicted as not taken.
-
-;; ??? The non-annulled condition should really be "in_delay_slot",
-;; but insns that can be filled in non-annulled get priority over insns
-;; that can only be filled in anulled.
-
+;; Conditional branches with delay slots are available starting with SH2.
(define_delay
- (and (eq_attr "type" "cbranch")
- (match_test "TARGET_SH2"))
- ;; SH2e has a hardware bug that pretty much prohibits the use of
- ;; annulled delay slots.
- [(eq_attr "cond_delay_slot" "yes") (and (eq_attr "cond_delay_slot" "yes")
- (not (eq_attr "cpu" "sh2e"))) (nil)])
+ (and (eq_attr "type" "cbranch") (match_test "TARGET_SH2"))
+ [(eq_attr "cond_delay_slot" "yes") (nil) (nil)])
;; -------------------------------------------------------------------------
;; SImode signed integer comparisons
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9a2bb4b..1bd4bac 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-02-17 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/64793
+ * gcc.target/sh/pr64793.c: New.
+ * gcc.target/sh/pr51244-20-sh2a.c: Adjust expected cmp/gt insn count.
+
2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
* gcc.target/arm/divzero.c: New test case.
diff --git a/gcc/testsuite/gcc.target/sh/pr51244-20-sh2a.c b/gcc/testsuite/gcc.target/sh/pr51244-20-sh2a.c
index 82ed9e0..2c6f365 100644
--- a/gcc/testsuite/gcc.target/sh/pr51244-20-sh2a.c
+++ b/gcc/testsuite/gcc.target/sh/pr51244-20-sh2a.c
@@ -8,7 +8,7 @@
/* { dg-final { scan-assembler-times "nott" 2 } } */
/* { dg-final { scan-assembler-times "cmp/eq" 2 } } */
/* { dg-final { scan-assembler-times "cmp/hi" 4 } } */
-/* { dg-final { scan-assembler-times "cmp/gt" 3 } } */
+/* { dg-final { scan-assembler-times "cmp/gt" 2 } } */
/* { dg-final { scan-assembler-not "not\t" } } */
#include "pr51244-20.c"
diff --git a/gcc/testsuite/gcc.target/sh/pr64793.c b/gcc/testsuite/gcc.target/sh/pr64793.c
new file mode 100644
index 0000000..5bcc1e6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr64793.c
@@ -0,0 +1,18 @@
+/* Check that the delay slot of an rts insn is filled, if it follows a cbranch
+ with an unfilled delay slot, as in:
+ bt .L3
+ mov r7,r0 <<< this insn
+ rts
+ nop <<< should go into this delay slot
+*/
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "nop" } } */
+
+int
+test_0 (const char* x, int a, int b, int c)
+{
+ if (x[a] == 92)
+ return b;
+ return c;
+}