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| author | Hans-Peter Nilsson <hp@axis.com> | 2020-02-03 03:15:01 +0100 |
|---|---|---|
| committer | Hans-Peter Nilsson <hp@axis.com> | 2020-05-09 04:18:17 +0200 |
| commit | d137723be6b9bb0f7c0e69aea0c6735ad092f366 (patch) | |
| tree | 2926c6654c6a53660b0376342002b64a30c1d38d | |
| parent | 730cafefe6b96ddacfd1c2145b39dde68bed4f4f (diff) | |
| download | gcc-d137723be6b9bb0f7c0e69aea0c6735ad092f366.zip gcc-d137723be6b9bb0f7c0e69aea0c6735ad092f366.tar.gz gcc-d137723be6b9bb0f7c0e69aea0c6735ad092f366.tar.bz2 | |
cris: Enable 32-bit shifts, clz, bswap, umin to set condition codes.
Enables dropping of compares with zero of the result, through
any CCmode substitution.
gcc:
* config/cris/cris.md
("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
from "<shlr>si3".
("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
from "clzsi2".
("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
from "bswapsi2".
("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/cris/cris.md | 8 |
2 files changed, 11 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 54073e2..9aca1c3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -145,6 +145,13 @@ from "xorsi3". ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename from "one_cmplsi2". + ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename + from "<shlr>si3". + ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename + from "clzsi2". + ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename + from "bswapsi2". + ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3". 2020-05-08 Vladimir Makarov <vmakarov@redhat.com> diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index 6faef6c..c085e26 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -1758,7 +1758,7 @@ ;; Arithmetic/Logical shift right (and SI left). -(define_insn "<shlr>si3" +(define_insn "<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>" [(set (match_operand:SI 0 "register_operand" "=r") (shift:SI (match_operand:SI 1 "register_operand" "0") (match_operand:SI 2 "nonmemory_operand" "Kcr"))) @@ -1918,7 +1918,7 @@ "" "operands[2] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode);") -(define_insn "clzsi2" +(define_insn "<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>" [(set (match_operand:SI 0 "register_operand" "=r") (clz:SI (match_operand:SI 1 "register_operand" "r"))) (clobber (reg:CC CRIS_CC0_REGNUM))] @@ -1926,7 +1926,7 @@ "lz %1,%0" [(set_attr "slottable" "yes")]) -(define_insn "bswapsi2" +(define_insn "<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>" [(set (match_operand:SI 0 "register_operand" "=r") (bswap:SI (match_operand:SI 1 "register_operand" "0"))) (clobber (reg:CC CRIS_CC0_REGNUM))] @@ -1979,7 +1979,7 @@ "" "") -(define_insn "*uminsi3" +(define_insn "*uminsi3<setcc><setnz><setnzvc>" [(set (match_operand:SI 0 "register_operand" "=r,r, r,r") (umin:SI (match_operand:SI 1 "register_operand" "%0,0, 0,r") (match_operand:SI 2 "general_operand" "r,Q>,g,!To"))) |