diff options
author | Kewen Lin <linkw@linux.ibm.com> | 2020-03-08 21:55:11 -0500 |
---|---|---|
committer | Kewen Lin <linkw@linux.ibm.com> | 2020-03-08 21:55:11 -0500 |
commit | cb2c60206f4f2218f84ccde21663b00de068d8c7 (patch) | |
tree | 25cdcb91a07cdcd68881f3e8bc0b856b854fe665 | |
parent | d5114529228f97c2a433fa72ddea3fadeb6465b3 (diff) | |
download | gcc-cb2c60206f4f2218f84ccde21663b00de068d8c7.zip gcc-cb2c60206f4f2218f84ccde21663b00de068d8c7.tar.gz gcc-cb2c60206f4f2218f84ccde21663b00de068d8c7.tar.bz2 |
[testsuite] Fix PR94019 to check vector char when vect_hw_misalign
As PR94019 shows, without misaligned vector access support but with
realign load, the vectorized loop will end up with realign scheme.
It generates mask (control vector) with return type vector signed
char which breaks the not check.
gcc/testsuite/ChangeLog
2020-03-09 Kewen Lin <linkw@gcc.gnu.org>
PR testsuite/94019
* gcc.dg/vect/vect-over-widen-17.c: Don't expect vector char if
it's without misaligned vector access support.
-rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/vect/vect-over-widen-17.c | 5 |
2 files changed, 10 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2126a24..b72b9cb 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,11 @@ 2020-03-09 Kewen Lin <linkw@gcc.gnu.org> + PR testsuite/94019 + * gcc.dg/vect/vect-over-widen-17.c: Don't expect vector char if it's + without misaligned vector access support. + +2020-03-09 Kewen Lin <linkw@gcc.gnu.org> + PR testsuite/94023 * gcc.dg/vect/slp-perm-12.c: Expect loop vectorized messages only on vect_hw_misalign targets. diff --git a/gcc/testsuite/gcc.dg/vect/vect-over-widen-17.c b/gcc/testsuite/gcc.dg/vect/vect-over-widen-17.c index 0448260..333d74a 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-over-widen-17.c +++ b/gcc/testsuite/gcc.dg/vect/vect-over-widen-17.c @@ -41,6 +41,9 @@ main (void) } /* { dg-final { scan-tree-dump-not {vect_recog_over_widening_pattern: detected} "vect" } } */ -/* { dg-final { scan-tree-dump-not {vector[^\n]*char} "vect" } } */ +/* On Power, if there is no vect_hw_misalign support, unaligned vector access + adopts realign_load scheme. It requires rs6000_builtin_mask_for_load to + generate mask whose return type is vector char. */ +/* { dg-final { scan-tree-dump-not {vector[^\n]*char} "vect" { target vect_hw_misalign } } } */ /* { dg-final { scan-tree-dump-not {vector[^ ]* int} "vect" } } */ /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 1 "vect" } } */ |