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author | Richard Earnshaw <rearnsha@arm.com> | 2003-11-12 16:15:07 +0000 |
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committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2003-11-12 16:15:07 +0000 |
commit | c9389e79d44d90d591ea189b3dcf55ee75991639 (patch) | |
tree | 61c496c21ed3191c057397e00a409e89cc9f8f56 | |
parent | 7e28e1a3da46cd824a80d5efddb10384cb324411 (diff) | |
download | gcc-c9389e79d44d90d591ea189b3dcf55ee75991639.zip gcc-c9389e79d44d90d591ea189b3dcf55ee75991639.tar.gz gcc-c9389e79d44d90d591ea189b3dcf55ee75991639.tar.bz2 |
arm.md (storehi): Avoid use of explicit subreg.
* arm.md (storehi): Avoid use of explicit subreg.
(storehi_bigend, storeinthi, movhi_bigend): Likewise.
From-SVN: r73496
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/arm/arm.md | 14 |
2 files changed, 14 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 393e405..28c9c3c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2003-11-12 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (storehi): Avoid use of explicit subreg. + (storehi_bigend, storeinthi, movhi_bigend): Likewise. + 2003-11-12 J"orn Rennecke <joern.rennecke@superh.com> * config/sh/sh.md (prefetch): New pattern. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 9a693a8..289687f 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4007,7 +4007,7 @@ (set (match_dup 2) (ashiftrt:SI (match_operand 0 "" "") (const_int 8))) ;; store the high byte - (set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe + (set (match_dup 4) (match_dup 5))] "TARGET_ARM" " { @@ -4023,7 +4023,8 @@ operands[1] = adjust_address (operands[1], QImode, 0); operands[3] = gen_lowpart (QImode, operands[0]); operands[0] = gen_lowpart (SImode, operands[0]); - operands[2] = gen_reg_rtx (SImode); + operands[2] = gen_reg_rtx (SImode); + operands[5] = gen_lowpart (QImode, operands[2]); }" ) @@ -4031,7 +4032,7 @@ [(set (match_dup 4) (match_dup 3)) (set (match_dup 2) (ashiftrt:SI (match_operand 0 "" "") (const_int 8))) - (set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))] + (set (match_operand 1 "" "") (match_dup 5))] "TARGET_ARM" " { @@ -4048,13 +4049,14 @@ operands[3] = gen_lowpart (QImode, operands[0]); operands[0] = gen_lowpart (SImode, operands[0]); operands[2] = gen_reg_rtx (SImode); + operands[5] = gen_lowpart (QImode, operands[2]); }" ) ;; Subroutine to store a half word integer constant into memory. (define_expand "storeinthi" [(set (match_operand 0 "" "") - (subreg:QI (match_operand 1 "" "") 0)) + (match_operand 1 "" "")) (set (match_dup 3) (match_dup 2))] "TARGET_ARM" " @@ -4095,6 +4097,7 @@ operands[3] = adjust_address (op0, QImode, 1); operands[0] = adjust_address (operands[0], QImode, 0); operands[2] = gen_lowpart (QImode, operands[2]); + operands[1] = gen_lowpart (QImode, operands[1]); }" ) @@ -4415,11 +4418,12 @@ (set (match_dup 3) (ashiftrt:SI (match_dup 2) (const_int 16))) (set (match_operand:HI 0 "s_register_operand" "") - (subreg:HI (match_dup 3) 0))] + (match_dup 4))] "TARGET_ARM" " operands[2] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); + operands[4] = gen_lowpart (HImode, operands[3]); " ) |