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| author | Kito Cheng <kito.cheng@sifive.com> | 2023-02-22 17:16:20 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-02-22 20:20:34 +0800 |
| commit | c57fbdd6f11de2916fd0df6553e35117d3d12c5a (patch) | |
| tree | e0d29910c030151a07ae030747edf521028f5c30 | |
| parent | a0abd652e3878bd79ed802e868324ae3f617c380 (diff) | |
| download | gcc-c57fbdd6f11de2916fd0df6553e35117d3d12c5a.zip gcc-c57fbdd6f11de2916fd0df6553e35117d3d12c5a.tar.gz gcc-c57fbdd6f11de2916fd0df6553e35117d3d12c5a.tar.bz2 | |
RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c
LTO might generate random string for the section name, which might contain `mv`,
then might cause random false alarm.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/_Float16-zhinxmin-1.c: Tweak test
condition.
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c index 0070ebf..fa049db 100644 --- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c @@ -5,6 +5,6 @@ _Float16 foo1 (_Float16 a, _Float16 b) { /* { dg-final { scan-assembler-not "fmv.h" } } */ /* { dg-final { scan-assembler-not "fmv.s" } } */ - /* { dg-final { scan-assembler-times "mv" 1 } } */ + /* { dg-final { scan-assembler-times "mv\ta0" 1 } } */ return b; } |