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author | DJ Delorie <dj@redhat.com> | 2010-09-17 13:51:43 -0400 |
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committer | DJ Delorie <dj@gcc.gnu.org> | 2010-09-17 13:51:43 -0400 |
commit | bf9afb7d953d7f77c6305fed27c5fcd1a485686b (patch) | |
tree | 2261f24044404d72b7b8641faff82d36013f228d | |
parent | 765c3e8f08dbd7208f348e5d318ed2dc8042275b (diff) | |
download | gcc-bf9afb7d953d7f77c6305fed27c5fcd1a485686b.zip gcc-bf9afb7d953d7f77c6305fed27c5fcd1a485686b.tar.gz gcc-bf9afb7d953d7f77c6305fed27c5fcd1a485686b.tar.bz2 |
rx.c (valid_psw_flag): New.
* config/rx/rx.c (valid_psw_flag): New.
(rx_expand_builtin): Call it for setpsw/clrpsw.
(rx_expand_builtin_mvtipl): Pass an integer to IN_RANGE, not an
RTX.
* config/rx/rx.md (bitclr): Don't mark the output as early-clobber.
(bitclr_in_memory): Likewise.
(clrspw, setpsw, mvfc, mvtc, mvtipl): Make volatile.
From-SVN: r164376
-rw-r--r-- | gcc/ChangeLog | 13 | ||||
-rw-r--r-- | gcc/config/rx/rx.c | 39 | ||||
-rw-r--r-- | gcc/config/rx/rx.md | 14 |
3 files changed, 54 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3d2d377..cb1bbd1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2010-09-17 DJ Delorie <dj@redhat.com> + + * config/rx/rx.c (rx_print_operand): If __builtin_rx_setpsw() is + passed an invalid value, print an error instead of ICEing. + (valid_psw_flag): New. + (rx_expand_builtin): Call it for setpsw/clrpsw. + (rx_expand_builtin_mvtipl): Pass an integer to IN_RANGE, not an + RTX. + + * config/rx/rx.md (bitclr): Don't mark the output as early-clobber. + (bitclr_in_memory): Likewise. + (clrspw, setpsw, mvfc, mvtc, mvtipl): Make volatile. + 2010-09-17 H.J. Lu <hongjiu.lu@intel.com> PR middle-end/45678 diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c index 2299273..a932eb5 100644 --- a/gcc/config/rx/rx.c +++ b/gcc/config/rx/rx.c @@ -1905,7 +1905,7 @@ rx_expand_builtin_mvtipl (rtx arg) if (rx_cpu_type == RX610) return NULL_RTX; - if (! CONST_INT_P (arg) || ! IN_RANGE (arg, 0, (1 << 4) - 1)) + if (! CONST_INT_P (arg) || ! IN_RANGE (INTVAL (arg), 0, (1 << 4) - 1)) return NULL_RTX; emit_insn (gen_mvtipl (arg)); @@ -1974,6 +1974,31 @@ rx_expand_builtin_round (rtx arg, rtx target) return target; } +static int +valid_psw_flag (rtx op, char *which) +{ + static int mvtc_inform_done = 0; + + if (GET_CODE (op) == CONST_INT) + switch (INTVAL (op)) + { + case 0: case 'c': case 'C': + case 1: case 'z': case 'Z': + case 2: case 's': case 'S': + case 3: case 'o': case 'O': + case 8: case 'i': case 'I': + case 9: case 'u': case 'U': + return 1; + } + + error ("__builtin_rx_%s takes 'C', 'Z', 'S', 'O', 'I', or 'U'", which); + if (!mvtc_inform_done) + error ("use __builtin_rx_mvtc (0, ... ) to write arbitrary values to PSW"); + mvtc_inform_done = 1; + + return 0; +} + static rtx rx_expand_builtin (tree exp, rtx target, @@ -1989,10 +2014,14 @@ rx_expand_builtin (tree exp, switch (fcode) { case RX_BUILTIN_BRK: emit_insn (gen_brk ()); return NULL_RTX; - case RX_BUILTIN_CLRPSW: return rx_expand_void_builtin_1_arg - (op, gen_clrpsw, false); - case RX_BUILTIN_SETPSW: return rx_expand_void_builtin_1_arg - (op, gen_setpsw, false); + case RX_BUILTIN_CLRPSW: + if (!valid_psw_flag (op, "clrpsw")) + return NULL_RTX; + return rx_expand_void_builtin_1_arg (op, gen_clrpsw, false); + case RX_BUILTIN_SETPSW: + if (!valid_psw_flag (op, "setpsw")) + return NULL_RTX; + return rx_expand_void_builtin_1_arg (op, gen_setpsw, false); case RX_BUILTIN_INT: return rx_expand_void_builtin_1_arg (op, gen_int, false); case RX_BUILTIN_MACHI: return rx_expand_builtin_mac (exp, gen_machi); diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index 0ad5363..e0271d6 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -1369,7 +1369,7 @@ ) (define_insn "bitclr" - [(set:SI (match_operand:SI 0 "register_operand" "+r") + [(set:SI (match_operand:SI 0 "register_operand" "=r") (and:SI (match_operand:SI 1 "register_operand" "0") (not:SI (ashift:SI (const_int 1) (match_operand:SI 2 "nonmemory_operand" "ri")))))] @@ -1379,7 +1379,7 @@ ) (define_insn "bitclr_in_memory" - [(set:QI (match_operand:QI 0 "memory_operand" "+m") + [(set:QI (match_operand:QI 0 "memory_operand" "=m") (and:QI (match_operand:QI 1 "memory_operand" "0") (not:QI (ashift:QI (const_int 1) (match_operand:QI 2 "nonmemory_operand" "ri")))))] @@ -1803,7 +1803,7 @@ ;; Clear Processor Status Word (define_insn "clrpsw" - [(unspec:SI [(match_operand:SI 0 "immediate_operand" "i")] + [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")] UNSPEC_BUILTIN_CLRPSW) (clobber (reg:CC CC_REG))] "" @@ -1813,7 +1813,7 @@ ;; Set Processor Status Word (define_insn "setpsw" - [(unspec:SI [(match_operand:SI 0 "immediate_operand" "i")] + [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")] UNSPEC_BUILTIN_SETPSW) (clobber (reg:CC CC_REG))] "" @@ -1824,7 +1824,7 @@ ;; Move from control register (define_insn "mvfc" [(set (match_operand:SI 0 "register_operand" "=r") - (unspec:SI [(match_operand:SI 1 "immediate_operand" "i")] + (unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "i")] UNSPEC_BUILTIN_MVFC))] "" "mvfc\t%C1, %0" @@ -1833,7 +1833,7 @@ ;; Move to control register (define_insn "mvtc" - [(unspec:SI [(match_operand:SI 0 "immediate_operand" "i,i") + [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i,i") (match_operand:SI 1 "nonmemory_operand" "r,i")] UNSPEC_BUILTIN_MVTC)] "" @@ -1848,7 +1848,7 @@ ;; Move to interrupt priority level (define_insn "mvtipl" - [(unspec:SI [(match_operand:SI 0 "immediate_operand" "Uint04")] + [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "Uint04")] UNSPEC_BUILTIN_MVTIPL)] "" "mvtipl\t%0" |