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authorGCC Administrator <gccadmin@gcc.gnu.org>2021-01-09 00:16:22 +0000
committerGCC Administrator <gccadmin@gcc.gnu.org>2021-01-09 00:16:22 +0000
commitbf5cbb9edffc90eefba5c683dda0f1915e125018 (patch)
tree3044e1737584d35b9ee82436efe2319128cdb70e
parent0b874e0ffd5fab85d4b33059cb093322dfe7a3ba (diff)
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Daily bump.
-rw-r--r--gcc/ChangeLog169
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/cp/ChangeLog13
-rw-r--r--gcc/fortran/ChangeLog14
-rw-r--r--gcc/testsuite/ChangeLog97
-rw-r--r--libstdc++-v3/ChangeLog5
6 files changed, 299 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 90c169e..2a2b1a7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,172 @@
+2021-01-08 Sergei Trofimovich <siarheit@google.com>
+
+ * ipa-modref.c (merge_call_side_effects): Fix
+ linebreak split by reordering two print calls.
+
+2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/vector.md (*tf_to_fprx2_0): Rename from
+ "*mov_tf_to_fprx2_0" for consistency, fix constraint.
+ (*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
+ consistency, fix constraint.
+
+2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/s390-c.c (s390_def_or_undef_macro): Accept
+ callables instead of mask values.
+ (struct target_flag_set_p): New predicate.
+ (s390_cpu_cpp_builtins_internal): Define or undefine
+ __LONG_DOUBLE_VX__ macro.
+
+2021-01-08 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98482
+ * config/i386/i386.c (x86_function_profiler): Use R10 and R11
+ to call mcount in large model with PIC for NO_PROFILE_COUNTERS
+ targets.
+
+2021-01-08 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.
+
+2021-01-08 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
+ (vect_build_slp_tree): On cache hit release the matched
+ scalar stmts vector.
+ * tree-vect-stmts.c (vectorizable_store): Properly free
+ vec_oprnds before possibly gathering them again.
+
+2021-01-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98544
+ * tree-vect-slp.c (vect_optimize_slp): Always materialize
+ permutes at a permute node.
+
+2021-01-08 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98482
+ * config/i386/i386.c (x86_function_profiler): Use R10 to call
+ mcount in large model. Sorry for large model with PIC.
+
+2021-01-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98585
+ * config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
+ ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
+ ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
+ TargetSave and initialize for variables with enum types.
+ (mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
+ mstack-protector-guard-symbol=): Add Save.
+ * config/i386/i386-options.c (ix86_function_specific_save,
+ ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
+ x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
+ x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
+ x_ix86_veclibabi_type.
+
+2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
+ SVE_FULL_I to SVE_I.
+ (*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
+
+2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
+ SVE_FULL_I to SVE_I.
+ (*cond_uxt<mode>_any): Likewise.
+
+2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/iterators.md (Vwhalf): New iterator.
+ * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
+ Rename to...
+ (aarch64_<sur>adalp<mode>): ... This. Make more
+ builtin-friendly.
+ (<sur>sadv16qi): Adjust callsite of the above.
+ * config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
+ builtins.
+ * config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
+ builtins.
+ (vpadal_s16): Likewise.
+ (vpadal_u8): Likewise.
+ (vpadal_u16): Likewise.
+ (vpadalq_s8): Likewise.
+ (vpadalq_s16): Likewise.
+ (vpadalq_s32): Likewise.
+ (vpadalq_u8): Likewise.
+ (vpadalq_u16): Likewise.
+ (vpadalq_u32): Likewise.
+
+2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3):
+ Rename to...
+ (aarch64_<su>abd<mode>): ... This.
+ (<sur>sadv16qi): Adjust callsite of the above.
+ * config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define
+ builtins.
+ * config/aarch64/arm_neon.h (vabd_s8): Reimplement using
+ builtin.
+ (vabd_s16): Likewise.
+ (vabd_s32): Likewise.
+ (vabd_u8): Likewise.
+ (vabd_u16): Likewise.
+ (vabd_u32): Likewise.
+ (vabdq_s8): Likewise.
+ (vabdq_s16): Likewise.
+ (vabdq_s32): Likewise.
+ (vabdq_u8): Likewise.
+ (vabdq_u16): Likewise.
+ (vabdq_u32): Likewise.
+
+2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define
+ builtins.
+ * config/aarch64/arm_neon.h (vaba_s8): Implement using builtin.
+ (vaba_s16): Likewise.
+ (vaba_s32): Likewise.
+ (vaba_u8): Likewise.
+ (vaba_u16): Likewise.
+ (vaba_u32): Likewise.
+ (vabaq_s8): Likewise.
+ (vabaq_s16): Likewise.
+ (vabaq_s32): Likewise.
+ (vabaq_u8): Likewise.
+ (vabaq_u16): Likewise.
+ (vabaq_u32): Likewise.
+
+2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
+ (aarch64_<su>aba<mode>): ... This. Handle uaba as well.
+ Change RTL pattern to match.
+
+2021-01-08 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (riscv_current_subset_list): New.
+ * config/riscv/riscv-c.c (riscv-subset.h): New.
+ (INCLUDE_STRING): Define.
+ (riscv_cpu_cpp_builtins): Add new style architecture extension
+ test macros.
+ * config/riscv/riscv-subset.h (riscv_subset_list::begin): New.
+ (riscv_subset_list::end): New.
+ (riscv_current_subset_list): New.
+
+2021-01-08 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION):
+ Move to riscv-subset.h.
+ (struct riscv_subset_t): Ditto.
+ (class riscv_subset_list): Ditto.
+ * config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move
+ from riscv-common.c.
+ (struct riscv_subset_t): Ditto.
+ (class riscv_subset_list): Ditto.
+ * config/riscv/t-riscv ($(common_out_file)): Add file
+ dependency.
+
2021-01-07 Jakub Jelinek <jakub@redhat.com>
PR target/98567
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index cb4ae0b..75cdb7a 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210108
+20210109
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index b8e291c..53f0538 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,16 @@
+2021-01-08 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/98551
+ * constexpr.c (cxx_eval_call_expression): Check CLASS_TYPE_P
+ instead of AGGREGATE_TYPE_P before calling replace_result_decl.
+
+2021-01-08 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/98515
+ * semantics.c (check_accessibility_of_qualified_id): Punt if
+ we're checking access of a scoped non-static member inside a
+ class template.
+
2021-01-07 Jakub Jelinek <jakub@redhat.com>
PR c++/98329
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 84d4490..82c6dca 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,17 @@
+2021-01-08 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/93794
+ * trans-expr.c (gfc_conv_component_ref): Remove the condition
+ that deferred character length components only be allocatable.
+
+2021-01-08 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/98458
+ * simplify.c (is_constant_array_expr): If an array constructor
+ expression has elements other than constants or structures, try
+ fixing the expression with gfc_reduce_init_expr. Also, if shape
+ is NULL, obtain the array size and set it.
+
2021-01-07 Paul Thomas <pault@gcc.gnu.org>
PR fortran/93701
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8787eee..14b6202 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,100 @@
+2021-01-08 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98482
+ * gcc.target/i386/pr98482-1.c: Require lp64.
+ * gcc.target/i386/pr98482-2.c: Likewise.
+
+2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * gcc.target/s390/vector/long-double-vx-macro-off-on.c: New test.
+ * gcc.target/s390/vector/long-double-vx-macro-on-off.c: New test.
+
+2021-01-08 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/98551
+ * g++.dg/cpp0x/constexpr-pmf2.C: New test.
+
+2021-01-08 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/98515
+ * g++.dg/template/access32.C: New test.
+ * g++.dg/template/access33.C: New test.
+
+2021-01-08 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98482
+ * gcc.target/i386/pr98482-2.c: Updated.
+
+2021-01-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98544
+ * gcc.dg/vect/bb-slp-pr98544.c: New testcase.
+
+2021-01-08 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98482
+ * gcc.target/i386/pr98482-1.c: New test.
+ * gcc.target/i386/pr98482-1.c: Likewise.
+ * gcc.target/i386/pr98482-2.c: New file.
+
+2021-01-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98585
+ * gcc.target/i386/pr98585.c: New test.
+
+2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/cnot_2.c: New test.
+ * gcc.target/aarch64/sve/cond_cnot_4.c: Likewise.
+ * gcc.target/aarch64/sve/cond_cnot_4_run.c: Likewise.
+ * gcc.target/aarch64/sve/cond_cnot_5.c: Likewise.
+ * gcc.target/aarch64/sve/cond_cnot_5_run.c: Likewise.
+ * gcc.target/aarch64/sve/cond_cnot_6.c: Likewise.
+ * gcc.target/aarch64/sve/cond_cnot_6_run.c: Likewise.
+
+2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/cond_uxt_5.c: New test.
+ * gcc.target/aarch64/sve/cond_uxt_5_run.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_6.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_6_run.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_7.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_7_run.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_8.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_8_run.c: Likewise.
+
+2021-01-08 Tamar Christina <tamar.christina@arm.com>
+
+ * lib/target-supports.exp
+ (check_effective_target_aarch64_asm_sve2_ok): New.
+ * g++.target/aarch64/sve2/acle/aarch64-sve2-acle-asm.exp: Use it.
+ * gcc.target/aarch64/sve2/acle/aarch64-sve2-acle-asm.exp: Likewise.
+
+2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * gcc.target/aarch64/usaba_1.c: New test.
+
+2021-01-08 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/93794
+ * gfortran.dg/deferred_character_35.f90 : New test.
+
+2021-01-08 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/98458
+ * gfortran.dg/implied_do_3.f90 : New test.
+
+2021-01-08 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.dg/array-quals-1.c: Allow srodata.
+
+2021-01-08 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/predef-10.c: New.
+ * gcc.target/riscv/predef-11.c: New.
+ * gcc.target/riscv/predef-12.c: New.
+ * gcc.target/riscv/predef-13.c: New.
+
2021-01-07 Jakub Jelinek <jakub@redhat.com>
PR c++/98329
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 33fdfc1..f64fa69 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,8 @@
+2021-01-08 Olivier Hainque <hainque@adacore.com>
+
+ * testsuite/20_util/bind/ref_neg.cc: Tweak the
+ dg-prune-output regex for out-of-build-tree contexts.
+
2021-01-07 Thomas Rodgers <trodgers@redhat.com>
* doc/doxygen/user.cfg.in: Add new header.