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author | GCC Administrator <gccadmin@gcc.gnu.org> | 2021-03-24 00:16:25 +0000 |
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committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2021-03-24 00:16:25 +0000 |
commit | bf1f3168f474734400e7a97660d1e7dec664bca9 (patch) | |
tree | 220fd7ed5f2e818008469a64b6e9834806bcfff9 | |
parent | be70bb5e4babdf9d3d33e8f4658452038407fa8e (diff) | |
download | gcc-bf1f3168f474734400e7a97660d1e7dec664bca9.zip gcc-bf1f3168f474734400e7a97660d1e7dec664bca9.tar.gz gcc-bf1f3168f474734400e7a97660d1e7dec664bca9.tar.bz2 |
Daily bump.
-rw-r--r-- | ChangeLog | 4 | ||||
-rw-r--r-- | contrib/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/ChangeLog | 115 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/cp/ChangeLog | 24 | ||||
-rw-r--r-- | gcc/fortran/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/po/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 130 | ||||
-rw-r--r-- | libgcc/ChangeLog | 5 | ||||
-rw-r--r-- | libstdc++-v3/ChangeLog | 18 |
10 files changed, 319 insertions, 1 deletions
@@ -1,3 +1,7 @@ +2021-03-23 David Malcolm <dmalcolm@redhat.com> + + * MAINTAINERS: Add myself as static analyzer maintainer. + 2021-03-18 Jeff Law <jlaw@tachyum.com> * MAINTAINERS: Update primary entry. diff --git a/contrib/ChangeLog b/contrib/ChangeLog index c1d9b52..ee7b5b5 100644 --- a/contrib/ChangeLog +++ b/contrib/ChangeLog @@ -1,3 +1,7 @@ +2021-03-23 Martin Liska <mliska@suse.cz> + + * mklog.py: Fix broken tests. + 2021-03-22 Martin Liska <mliska@suse.cz> * mklog.py: Add --directory argument. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 56bf67d..ef6f626 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,118 @@ +2021-03-23 Vladimir N. Makarov <vmakarov@redhat.com> + + PR target/99581 + * config/aarch64/constraints.md (Utq, UOb, UOh, UOw, UOd, UOty): + Use define_relaxed_memory_constraint for them. + +2021-03-23 Iain Sandoe <iain@sandoe.co.uk> + + PR target/99733 + * config/host-darwin.c (darwin_gt_pch_use_address): Add a + colon to the diagnostic message. + +2021-03-23 Ilya Leoshkevich <iii@linux.ibm.com> + + * fwprop.c (fwprop_propagation::fwprop_propagation): Look at + set_info's uses. + (try_fwprop_subst_note): Use set_info instead of insn_info. + (try_fwprop_subst_pattern): Likewise. + (try_fwprop_subst_notes): Likewise. + (try_fwprop_subst): Likewise. + (forward_propagate_subreg): Likewise. + (forward_propagate_and_simplify): Likewise. + (forward_propagate_into): Likewise. + * rtl-ssa/accesses.h (set_info::single_nondebug_use) New + method. + (set_info::single_nondebug_insn_use): Likewise. + (set_info::single_phi_use): Likewise. + * rtl-ssa/member-fns.inl (set_info::single_nondebug_use) New + method. + (set_info::single_nondebug_insn_use): Likewise. + (set_info::single_phi_use): Likewise. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * doc/sourcebuild.texi (arm_dsp_ok, arm_dsp): Document. + +2021-03-23 Jakub Jelinek <jakub@redhat.com> + + PR target/99540 + * config/aarch64/aarch64.c (aarch64_add_offset): Tell + expand_mult to perform an unsigned rather than a signed + multiplication. + +2021-03-23 H.J. Lu <hjl.tools@gmail.com> + + PR target/99704 + * config/i386/cpuid.h (__cpuid): Add __volatile__. + (__cpuid_count): Likewise. + +2021-03-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/99721 + * tree-vect-slp.c (vect_slp_analyze_node_operations): + Make sure we can schedule the node. + +2021-03-23 Marcus Comstedt <marcus@mc.pp.se> + + * config/riscv/riscv.c (riscv_subword): Take endianness into + account when calculating the byte offset. + +2021-03-23 Marcus Comstedt <marcus@mc.pp.se> + + * config/riscv/predicates.md (subreg_lowpart_operator): New predicate + * config/riscv/riscv.md (*addsi3_extended2, *subsi3_extended2) + (*negsi2_extended2, *mulsi3_extended2, *<optab>si3_mask) + (*<optab>si3_mask_1, *<optab>di3_mask, *<optab>di3_mask_1) + (*<optab>si3_extend_mask, *<optab>si3_extend_mask_1): Use + new predicate "subreg_lowpart_operator" + +2021-03-23 Marcus Comstedt <marcus@mc.pp.se> + + * config/riscv/riscv.c (riscv_swap_instruction): New function + to byteswap an SImode rtx containing an instruction. + (riscv_trampoline_init): Byteswap the generated instructions + when needed. + +2021-03-23 Marcus Comstedt <marcus@mc.pp.se> + + * common/config/riscv/riscv-common.c + (TARGET_DEFAULT_TARGET_FLAGS): Set default endianness. + * config.gcc (riscv32be-*, riscv64be-*): Set + TARGET_BIG_ENDIAN_DEFAULT to 1. + * config/riscv/elf.h (LINK_SPEC): Change -melf* value + depending on default endianness. + * config/riscv/freebsd.h (LINK_SPEC): Likewise. + * config/riscv/linux.h (LINK_SPEC): Likewise. + * config/riscv/riscv.c (TARGET_DEFAULT_TARGET_FLAGS): Set + default endianness. + * config/riscv/riscv.h (DEFAULT_ENDIAN_SPEC): New macro. + +2021-03-23 Marcus Comstedt <marcus@mc.pp.se> + + * config/riscv/elf.h (LINK_SPEC): Pass linker endianness flag. + * config/riscv/freebsd.h (LINK_SPEC): Likewise. + * config/riscv/linux.h (LINK_SPEC): Likewise. + * config/riscv/riscv.h (ASM_SPEC): Pass -mbig-endian and + -mlittle-endian. + (BYTES_BIG_ENDIAN): Handle big endian. + (WORDS_BIG_ENDIAN): Define to BYTES_BIG_ENDIAN. + * config/riscv/riscv.opt (-mbig-endian, -mlittle-endian): New + options. + * doc/invoke.texi (-mbig-endian, -mlittle-endian): Document. + +2021-03-23 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> + + * regcprop.c (find_oldest_value_reg): Ask target whether + different mode is fine for replacement register. + +2021-03-23 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/99296 + * value-range.cc (irange::irange_set_1bit_anti_range): New. + (irange::irange_set_anti_range): Call irange_set_1bit_anti_range + * value-range.h (irange::irange_set_1bit_anti_range): New. + 2021-03-22 Vladimir N. Makarov <vmakarov@redhat.com> PR target/99581 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index c3b4160..991050a 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20210323 +20210324 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index fb2978e..8133098 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,27 @@ +2021-03-23 Nathan Sidwell <nathan@acm.org> + + PR c++/99283 + * name-lookup.c (check_module_override): Set global or partition + DUP on the binding vector. + +2021-03-23 Marek Polacek <polacek@redhat.com> + + PR c++/99318 + * decl2.c (cp_warn_deprecated_use_scopes): Only call + cp_warn_deprecated_use when decl is a namespace, class, or enum. + +2021-03-23 Nathan Sidwell <nathan@acm.org> + + PR c++/99239 + * decl.c (duplicate_decls): Remove assert about maybe-imported + artificial decls. + +2021-03-23 Jakub Jelinek <jakub@redhat.com> + + PR c++/99650 + * decl.c (cp_finish_decomp): Diagnose void initializers when + using tuple_element and get. + 2021-03-22 Nathan Sidwell <nathan@acm.org> PR c++/99480 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index ff38399..94faac5 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,11 @@ +2021-03-23 Tobias Burnus <tobias@codesourcery.com> + + PR fortran/93660 + * trans-decl.c (build_function_decl): Add comment; + increment hidden_typelist for caf_token/caf_offset. + * trans-types.c (gfc_get_function_type): Add comment; + add missing caf_token/caf_offset args. + 2021-03-22 Tobias Burnus <tobias@codesourcery.com> PR fortran/99688 diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index 89e587a..53a5447 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,13 @@ +2021-03-23 Joseph Myers <joseph@codesourcery.com> + + * be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po, + ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, + zh_TW.po: Update. + +2021-03-23 Joseph Myers <joseph@codesourcery.com> + + * sv.po: Update. + 2021-03-19 Joseph Myers <joseph@codesourcery.com> * gcc.pot: Regenerate. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 94da0fa..8ee6b10 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,133 @@ +2021-03-23 Nathan Sidwell <nathan@acm.org> + + PR c++/99283 + * g++.dg/modules/pr99283-1_a.H: New. + * g++.dg/modules/pr99283-1_b.H: New. + +2021-03-23 Ilya Leoshkevich <iii@linux.ibm.com> + + * gcc.target/s390/vector/long-double-asm-abi.c: New test. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * lib/target-supports.exp + (check_effective_target_arm_dsp_ok_nocache) + (check_effective_target_arm_dsp_ok, add_options_for_arm_dsp): New. + * gcc.target/arm/acle/dsp_arith.c: Use arm_dsp_ok effective target + and add arm_dsp options. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * lib/target-supports.exp + (check_effective_target_arm_v8_1m_mve_fp_ok_nocache): Fix + -mfloat-abi= options order. + (check_effective_target_arm_v8_1m_mve_ok_nocache): Likewise + * gcc.target/arm/mve/intrinsics/mve_vector_float2.c: Add + arm_hard_ok effective target and -mfloat-abi=hard additional + option. + * gcc.target/arm/mve/intrinsics/mve_vector_int.c: Likewise. + * gcc.target/arm/mve/intrinsics/mve_vector_uint.c: Likewise. + * gcc.target/arm/mve/intrinsics/mve_vector_uint1.c: Likewise. + * gcc.target/arm/mve/intrinsics/mve_vector_uint2.c: Likewise. + * gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise. + * gcc.target/arm/armv8_1m-fp16-move-1.c: Add -mfloat-abi=hard + additional option. + * gcc.target/arm/armv8_1m-fp32-move-1.c: Likewise. + * gcc.target/arm/armv8_1m-fp64-move-1.c: Likewise. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * lib/target-supports.exp + (check_effective_target_arm_v8_2a_i8mm_ok_nocache): Fix + -mfloat-abi= options order. + (check_effective_target_arm_v8_2a_bf16_neon_ok_nocache): Likewise. + * gcc.target/arm/bfloat16_scalar_1_1.c: Add arm_hard_ok effective + target and -mfloat-abi=hard additional option. + * gcc.target/arm/bfloat16_simd_1_1.c: Likewise. + * gcc.target/arm/simd/bf16_ma_1.c: Likewise. + * gcc.target/arm/simd/bf16_mmla_1.c: Likewise. + * gcc.target/arm/simd/vdot-2-1.c: Likewise. + * gcc.target/arm/simd/vdot-2-2.c: Likewise. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/armv8_2-fp16-scalar-2.c: Add arm_hard_ok. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/bfloat16_simd_1_2.c: Add arm_softfp_ok. + * gcc.target/arm/bfloat16_simd_2_2.c: Likewise. + * gcc.target/arm/bfloat16_simd_3_2.c: Likewise. + * gcc.target/arm/pr51968.c: Likewise. + * gcc.target/arm/bfloat16_simd_2_1.c: arm_hard_ok. + * gcc.target/arm/bfloat16_simd_3_1.c: Likewise. + * gcc.target/arm/simd/bf16_vldn_1.c: Likewise. + * gcc.target/arm/simd/bf16_vstn_1.c: Likewise. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/armv8_1m-shift-imm-1.c: Remove -mfloat=abi option. + * gcc.target/arm/armv8_1m-shift-reg-1.c: Likewise. + * gcc.target/arm/bf16_dup.c: Likewise. + * gcc.target/arm/bf16_reinterpret.c: Likewise. + * gcc.target/arm/pr51534.c: Remove -mfloat=abi option. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/simd/vmmla_1.c: Add arm_v8_2a_i8mm options. + +2021-03-23 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/bfloat16_scalar_typecheck.c: Add + arm_v8_2a_fp16_neon and arm_v8_2a_bf16_neon. + * gcc.target/arm/bfloat16_vector_typecheck_1.c: Likewise. + * gcc.target/arm/bfloat16_vector_typecheck_2.c: Likewise. + +2021-03-23 Marek Polacek <polacek@redhat.com> + + PR c++/99318 + * g++.dg/cpp0x/attributes-namespace6.C: New test. + * g++.dg/cpp0x/gen-attrs-73.C: New test. + +2021-03-23 Tobias Burnus <tobias@codesourcery.com> + + PR fortran/93660 + * gfortran.dg/gomp/declare-simd-coarray-lib.f90: New test. + +2021-03-23 Richard Sandiford <richard.sandiford@arm.com> + + PR target/99540 + * gcc.dg/vect/pr99540.c: New test. + +2021-03-23 Nathan Sidwell <nathan@acm.org> + + PR c++/99239 + * g++.dg/modules/pr99239_a.H: New. + * g++.dg/modules/pr99239_b.H: New. + +2021-03-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/99721 + * gfortran.dg/vect/pr99721.f90: New testcase. + +2021-03-23 Marcus Comstedt <marcus@mc.pp.se> + + * gcc.target/riscv/shift-shift-5.c (sub): Change + order of struct fields depending on byteorder. + +2021-03-23 Jakub Jelinek <jakub@redhat.com> + + PR c++/99650 + * g++.dg/cpp1z/decomp55.C: New test. + +2021-03-23 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/99296 + * gcc.dg/pr99296.c: New file. + 2021-03-22 Nathan Sidwell <nathan@acm.org> PR c++/99480 diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index a99aaa0..3f49017 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2021-03-23 Marcus Comstedt <marcus@mc.pp.se> + + * config/riscv/sfp-machine.h (__BYTE_ORDER): Set according + to __BYTE_ORDER__. + 2021-03-06 Jakub Jelinek <jakub@redhat.com> PR gcov-profile/99406 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index e89ad6f..44271d3 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,21 @@ +2021-03-23 Jonathan Wakely <jwakely@redhat.com> + + * testsuite/std/ranges/adaptors/reverse.cc: Replace duplicated + line with a check that uses the const being/end overloads. + +2021-03-23 Moritz Sichert <sichert@in.tum.de> + + * include/std/ranges (reverse_view::begin, reverse_view::end): + Qualify make_reverse_iterator calls to avoid ADL. + * testsuite/std/ranges/adaptors/reverse.cc: Test that + views::reverse works when make_reverse_iterator is defined + in an associated namespace. + +2021-03-23 Jonathan Wakely <jwakely@redhat.com> + + * include/bits/c++config (_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT): + Do not define when compiling with Clang. + 2021-03-22 Jonathan Wakely <jwakely@redhat.com> * include/std/string_view (basic_string_view(Range&&)): Define new |