AVX512FP16: Add testcase for vcvtsh2si/vcvtsh2usi/vcvtsi2sh/vcvtusi2sh.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512fp16-helper.h (V512): Add int32
	component.
	* gcc.target/i386/avx512fp16-vcvtsh2si-1a.c: New test.
	* gcc.target/i386/avx512fp16-vcvtsh2si-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsh2si64-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsh2si64-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsh2usi-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsh2usi64-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsh2usi64-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsi2sh-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsi2sh-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsi2sh64-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtsi2sh64-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtusi2sh-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtusi2sh-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtusi2sh64-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vcvtusi2sh64-1b.c: Ditto.

17 files changed, 509 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
index aa83b66..cf1c536 100644
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
@@ -34,6 +34,7 @@ typedef union
   __m128i	  xmmi[4];
   unsigned short  u16[32];
   unsigned int    u32[16];
+  int		  i32[16];
   long long	  s64[8];
   unsigned long long u64[8];
   float           f32[16];
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c
new file mode 100644
index 0000000..f29c953
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+
+
+#include <immintrin.h>
+
+volatile __m128h x1;
+volatile int res1;
+
+void extern
+avx512f_test (void)
+{
+  res1 = _mm_cvtsh_i32 (x1);
+  res1 = _mm_cvt_roundsh_i32 (x1, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1b.c
new file mode 100644
index 0000000..89c492c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1b.c
@@ -0,0 +1,54 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 2
+
+void NOINLINE
+emulate_cvtph2_d(V512 * dest, V512 op1,
+		 __mmask32 k, int zero_mask)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  __mmask16 m1, m2;
+
+  m1 = k & 0xffff;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+
+  for (i = 0; i < 16; i++) {
+    if (((1 << i) & m1) == 0) {
+      if (zero_mask) {
+	v5.u32[i] = 0;
+      }
+      else {
+	v5.u32[i] = dest->u32[i];
+      }
+    }
+    else {
+      v5.u32[i] = v1.f32[i];
+
+    }
+  }
+  *dest = v5;
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_cvtph2_d(&exp, src1,  NET_MASK, 0);
+  res.i32[0] = _mm_cvt_roundsh_i32(src1.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_cvt_roundsh_i32");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1a.c
new file mode 100644
index 0000000..0289ebf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%rax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%rax" 1 } } */
+
+
+#include <immintrin.h>
+
+volatile __m128h x1;
+volatile long long res2;
+
+void extern
+avx512f_test (void)
+{
+  res2 = _mm_cvtsh_i64 (x1);
+  res2 = _mm_cvt_roundsh_i64 (x1, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1b.c
new file mode 100644
index 0000000..6a5e836
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1b.c
@@ -0,0 +1,52 @@
+/* { dg-do run { target { { ! ia32 } && avx512fp16 } } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 4
+
+void NOINLINE
+emulate_cvtph2_q(V512 * dest, V512 op1,
+		 __mmask32 k, int zero_mask)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  __mmask16 m1, m2;
+
+  m1 = k & 0xffff;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+
+  for (i = 0; i < 8; i++) {
+    if (((1 << i) & m1) == 0) {
+      if (zero_mask) {
+	v5.u64[i] = 0;
+      }
+      else {
+	v5.u64[i] = dest->u64[i];
+      }
+    }
+    else {
+      v5.u64[i] = v1.f32[i];
+    }
+  }
+  *dest = v5;
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_cvtph2_q(&exp, src1,  NET_MASK, 0);
+  res.s64[0] = _mm_cvt_roundsh_i64(src1.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_cvt_roundsh_i64");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c
new file mode 100644
index 0000000..7d00867
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+
+
+#include <immintrin.h>
+
+volatile __m128h x1;
+volatile unsigned int res1;
+
+void extern
+avx512f_test (void)
+{
+  res1 = _mm_cvtsh_u32 (x1);
+  res1 = _mm_cvt_roundsh_u32 (x1, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1b.c
new file mode 100644
index 0000000..466ce6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1b.c
@@ -0,0 +1,54 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 2
+
+void NOINLINE
+emulate_cvtph2_d(V512 * dest, V512 op1,
+		 __mmask32 k, int zero_mask)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  __mmask16 m1, m2;
+
+  m1 = k & 0xffff;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+
+  for (i = 0; i < 16; i++) {
+    if (((1 << i) & m1) == 0) {
+      if (zero_mask) {
+	v5.u32[i] = 0;
+      }
+      else {
+	v5.u32[i] = dest->u32[i];
+      }
+    }
+    else {
+      v5.u32[i] = v1.f32[i];
+
+    }
+  }
+  *dest = v5;
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_cvtph2_d(&exp, src1,  NET_MASK, 0);
+  res.u32[0] = _mm_cvt_roundsh_i32(src1.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_cvt_roundsh_u32");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1a.c
new file mode 100644
index 0000000..363252d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile  { target { ! ia32 } } } */
+/* { dg-options "-mavx512fp16 -O2 " } */
+/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%rax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%rax" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x1;
+volatile unsigned long long res2;
+
+void extern
+avx512f_test (void)
+{
+  res2 = _mm_cvtsh_u64 (x1);
+  res2 = _mm_cvt_roundsh_u64 (x1, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1b.c
new file mode 100644
index 0000000..74643ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1b.c
@@ -0,0 +1,53 @@
+/* { dg-do run  { target { { ! ia32 } && avx512fp16 } } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 4
+
+void NOINLINE
+emulate_cvtph2_q(V512 * dest, V512 op1,
+		 __mmask32 k, int zero_mask)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  __mmask16 m1, m2;
+
+  m1 = k & 0xffff;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+
+  for (i = 0; i < 8; i++) {
+    if (((1 << i) & m1) == 0) {
+      if (zero_mask) {
+	v5.u64[i] = 0;
+      }
+      else {
+	v5.u64[i] = dest->u64[i];
+      }
+    }
+    else {
+      v5.u64[i] = v1.f32[i];
+    }
+  }
+  *dest = v5;
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_cvtph2_q(&exp, src1,  NET_MASK, 0);
+  res.u64[0] = _mm_cvt_roundsh_i64(src1.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, 4, "_mm_cvt_roundsh_u64");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1a.c
new file mode 100644
index 0000000..19d1b96
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsi2shl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsi2shl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x;
+volatile int n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvti32_sh (x, n);
+  x = _mm_cvt_roundi32_sh (x, n, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1b.c
new file mode 100644
index 0000000..d9c9a85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1b.c
@@ -0,0 +1,41 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_vcvtsi2sh(V512 *dest, V512 op1, 
+		  int value_32, __int64_t value_64, int bits)
+{
+  V512 v1,v2,v5,v6;
+  unpack_ph_2twops(op1, &v1, &v2);
+  if (bits == 32)
+    v5.xmm[0] = _mm_cvt_roundi32_ss (v1.xmm[0], value_32, _ROUND_NINT);
+#ifdef __x86_64__
+  else 
+    v5.xmm[0] = _mm_cvt_roundi64_ss (v1.xmm[0], value_64, _ROUND_NINT);
+#endif
+  v5.xmm[1] = v1.xmm[1]; 
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_vcvtsi2sh(&exp, src1, 99, 0, 32);
+  res.xmmh[0] = _mm_cvt_roundi32_sh(src1.xmmh[0], 99, _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_cvt_roundi32_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1a.c
new file mode 100644
index 0000000..7781e36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsi2shq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsi2shq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x;
+volatile long long n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvti64_sh (x, n);
+  x = _mm_cvt_roundi64_sh (x, n, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1b.c
new file mode 100644
index 0000000..6f66a87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1b.c
@@ -0,0 +1,41 @@
+/* { dg-do run { target { { ! ia32 } && avx512fp16 } } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_vcvtsi2sh(V512 *dest, V512 op1, 
+		  int value_32, __int64_t value_64, int bits)
+{
+  V512 v1,v2,v5,v6;
+  unpack_ph_2twops(op1, &v1, &v2);
+  if (bits == 32)
+    v5.xmm[0] = _mm_cvt_roundi32_ss (v1.xmm[0], value_32, _ROUND_NINT);
+#ifdef __x86_64__
+  else 
+    v5.xmm[0] = _mm_cvt_roundi64_ss (v1.xmm[0], value_64, _ROUND_NINT);
+#endif
+  v5.xmm[1] = v1.xmm[1]; 
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_vcvtsi2sh(&exp, src1, 0, 99, 64);
+  res.xmmh[0] = _mm_cvt_roundi64_sh(src1.xmmh[0], 99, _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_cvt_roundi64_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1a.c
new file mode 100644
index 0000000..3b6d095
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtusi2shl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2shl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x;
+volatile unsigned n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvtu32_sh (x, n);
+  x = _mm_cvt_roundu32_sh (x, n, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1b.c
new file mode 100644
index 0000000..d339f0a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1b.c
@@ -0,0 +1,41 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_vcvtusi2sh(V512 *dest, V512 op1, 
+		   int value_32, __int64_t value_64, int bits)
+{
+  V512 v1,v2,v5,v6;
+  unpack_ph_2twops(op1, &v1, &v2);
+  if (bits == 32)
+    v5.xmm[0] = _mm_cvt_roundu32_ss (v1.xmm[0], value_32, _ROUND_NINT);
+#ifdef __x86_64__
+  else 
+    v5.xmm[0] = _mm_cvt_roundu64_ss (v1.xmm[0], value_64, _ROUND_NINT);
+#endif
+  v5.xmm[1] = v1.xmm[1]; 
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_vcvtusi2sh(&exp, src1, 99, 0, 32);
+  res.xmmh[0] = _mm_cvt_roundu32_sh(src1.xmmh[0], 99, _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_cvt_roundu32_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1a.c
new file mode 100644
index 0000000..30fcdc2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtusi2shq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2shq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x;
+volatile unsigned long long n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvtu64_sh (x, n);
+  x = _mm_cvt_roundu64_sh (x, n, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1b.c
new file mode 100644
index 0000000..20e711e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1b.c
@@ -0,0 +1,41 @@
+/* { dg-do run { target { { ! ia32 } && avx512fp16 } } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_vcvtusi2sh(V512 *dest, V512 op1, 
+		   int value_32, __int64_t value_64, int bits)
+{
+  V512 v1,v2,v5,v6;
+  unpack_ph_2twops(op1, &v1, &v2);
+  if (bits == 32)
+    v5.xmm[0] = _mm_cvt_roundu32_ss (v1.xmm[0], value_32, _ROUND_NINT);
+#ifdef __x86_64__
+  else 
+    v5.xmm[0] = _mm_cvt_roundu64_ss (v1.xmm[0], value_64, _ROUND_NINT);
+#endif
+  v5.xmm[1] = v1.xmm[1]; 
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+  
+  init_src();
+  emulate_vcvtusi2sh(&exp, src1, 0, 99, 64);
+  res.xmmh[0] = _mm_cvt_roundu64_sh(src1.xmmh[0], 99, _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_cvt_roundu64_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+