diff options
| author | Eric Botcazou <ebotcazou@adacore.com> | 2012-12-16 10:25:17 +0000 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2012-12-16 10:25:17 +0000 |
| commit | ba6bdc291161cc347ee83e88d7f93efd80fb8f31 (patch) | |
| tree | 4faef93d90e276856005eaf25fedc681149fdb61 | |
| parent | 1bae867a84abddcbd146f0a8b5d82426c3bb8a46 (diff) | |
| download | gcc-ba6bdc291161cc347ee83e88d7f93efd80fb8f31.zip gcc-ba6bdc291161cc347ee83e88d7f93efd80fb8f31.tar.gz gcc-ba6bdc291161cc347ee83e88d7f93efd80fb8f31.tar.bz2 | |
re PR target/55673 (Reversed before/after handling in sparc_emit_membar_for_model)
PR target/55673
* config/sparc/sparc.c (sparc_emit_membar_for_model): Fix reversed
handling of before and after cases.
* config/sparc/sync.md (atomic_store): Fix pasto.
Co-Authored-By: Tomash Brechko <tomash.brechko@gmail.com>
From-SVN: r194531
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.c | 16 | ||||
| -rw-r--r-- | gcc/config/sparc/sync.md | 9 |
3 files changed, 20 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7156bc6..f3583ed 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,12 @@ 2012-12-16 Eric Botcazou <ebotcazou@adacore.com> + Tomash Brechko <tomash.brechko@gmail.com> + + PR target/55673 + * config/sparc/sparc.c (sparc_emit_membar_for_model): Fix reversed + handling of before and after cases. + * config/sparc/sync.md (atomic_store): Fix pasto. + +2012-12-16 Eric Botcazou <ebotcazou@adacore.com> PR rtl-optimization/55630 * expr.c (expand_assignment): Do not call copy_blkmode_to_reg to move diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 4e9de98..054672b 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -11190,26 +11190,26 @@ sparc_emit_membar_for_model (enum memmodel model, if (before_after & 1) { - if (model == MEMMODEL_ACQUIRE - || model == MEMMODEL_ACQ_REL - || model == MEMMODEL_SEQ_CST) + if (model == MEMMODEL_RELEASE + || model == MEMMODEL_ACQ_REL + || model == MEMMODEL_SEQ_CST) { if (load_store & 1) - mm |= LoadLoad | LoadStore; + mm |= LoadLoad | StoreLoad; if (load_store & 2) - mm |= StoreLoad | StoreStore; + mm |= LoadStore | StoreStore; } } if (before_after & 2) { - if (model == MEMMODEL_RELEASE + if (model == MEMMODEL_ACQUIRE || model == MEMMODEL_ACQ_REL || model == MEMMODEL_SEQ_CST) { if (load_store & 1) - mm |= LoadLoad | StoreLoad; + mm |= LoadLoad | LoadStore; if (load_store & 2) - mm |= LoadStore | StoreStore; + mm |= StoreLoad | StoreStore; } } diff --git a/gcc/config/sparc/sync.md b/gcc/config/sparc/sync.md index d11f663..0295e6e 100644 --- a/gcc/config/sparc/sync.md +++ b/gcc/config/sparc/sync.md @@ -35,8 +35,7 @@ (define_expand "membar" [(set (match_dup 1) - (unspec:BLK [(match_dup 1) - (match_operand:SI 0 "const_int_operand")] + (unspec:BLK [(match_dup 1) (match_operand:SI 0 "const_int_operand")] UNSPEC_MEMBAR))] "TARGET_V8 || TARGET_V9" { @@ -66,7 +65,7 @@ "stbar" [(set_attr "type" "multi")]) -;; For V8, LDSTUB has the effect of membar #StoreLoad +;; For V8, LDSTUB has the effect of membar #StoreLoad. (define_insn "*membar_storeload" [(set (match_operand:BLK 0 "" "") (unspec:BLK [(match_dup 0) (const_int 2)] UNSPEC_MEMBAR))] @@ -123,8 +122,8 @@ [(set_attr "type" "load,fpload")]) (define_expand "atomic_store<mode>" - [(match_operand:I 0 "register_operand" "") - (match_operand:I 1 "memory_operand" "") + [(match_operand:I 0 "memory_operand" "") + (match_operand:I 1 "register_operand" "") (match_operand:SI 2 "const_int_operand" "")] "" { |