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| author | Zhenqiang Chen <zhenqiang.chen@arm.com> | 2014-08-07 04:54:06 +0000 |
|---|---|---|
| committer | Zhenqiang Chen <zqchen@gcc.gnu.org> | 2014-08-07 04:54:06 +0000 |
| commit | b88fe5e9188827935065546825e686e9486caf0d (patch) | |
| tree | 68e96db1207de96e14f3c0c839ed05fc9d7d85ee | |
| parent | c0014b079fe34362888727502986ce7af50462b6 (diff) | |
| download | gcc-b88fe5e9188827935065546825e686e9486caf0d.zip gcc-b88fe5e9188827935065546825e686e9486caf0d.tar.gz gcc-b88fe5e9188827935065546825e686e9486caf0d.tar.bz2 | |
tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
ChangeLog
2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
* tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
testsuite/ChangeLog
2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
* gcc.target/arm/get_address_cost_aligned_max_offset.c: New test.
From-SVN: r213691
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c | 28 | ||||
| -rw-r--r-- | gcc/tree-ssa-loop-ivopts.c | 12 |
4 files changed, 48 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d54b5b8..81ab714 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset. + 2014-08-06 Vladimir Makarov <vmakarov@redhat.com> PR debug/61923 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0c5c386..e0af2ab 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * gcc.target/arm/get_address_cost_aligned_max_offset.c: New test. + 2014-08-06 Paolo Carlini <paolo.carlini@oracle.com> PR c++/43906 diff --git a/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c b/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c new file mode 100644 index 0000000..cc3e2f7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mthumb -O2" } */ +/* { dg-require-effective-target arm_thumb1_ok } */ + +unsigned int +test (const short p16[6 * 64]) +{ + unsigned int i = 6; + unsigned int ret = 0; + + do + { + unsigned long long *p64 = (unsigned long long*) p16; + unsigned int *p32 = (unsigned int*) p16; + ret += ret; + if (p16[1] || p32[1]) + ret++; + else if (p64[1] | p64[2] | p64[3]) + ret++; + p16 += 64; + i--; + } while (i != 0); + + return ret; +} + +/* { dg-final { scan-assembler-not "#22" } } */ +/* { dg-final { scan-assembler-not "#14" } } */ diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c index 134a51b..98b60ab 100644 --- a/gcc/tree-ssa-loop-ivopts.c +++ b/gcc/tree-ssa-loop-ivopts.c @@ -3309,6 +3309,18 @@ get_address_cost (bool symbol_present, bool var_present, XEXP (addr, 1) = gen_int_mode (off, address_mode); if (memory_address_addr_space_p (mem_mode, addr, as)) break; + /* For some TARGET, like ARM THUMB1, the offset should be nature + aligned. Try an aligned offset if address_mode is not QImode. */ + off = (address_mode == QImode) + ? 0 + : ((unsigned HOST_WIDE_INT) 1 << i) + - GET_MODE_SIZE (address_mode); + if (off > 0) + { + XEXP (addr, 1) = gen_int_mode (off, address_mode); + if (memory_address_addr_space_p (mem_mode, addr, as)) + break; + } } if (i == -1) off = 0; |