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authorAlexandre Oliva <oliva@adacore.com>2025-04-03 03:06:47 -0300
committerAlexandre Oliva <oliva@gnu.org>2025-04-03 03:06:47 -0300
commitb6d3a23cb027eb48a01ee5d70c6c72ab3bcde467 (patch)
tree9d33f15c4adee60df1e827c9f67313f1a3fd287a
parent6f72af0c2e389e9252b6994643155e51ef68821b (diff)
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[testsuite] [riscv] limit mcpu-xiangshan-nanhu.c to rv64
The testcase makes the -march option conditional on rv64, and #errors out if the desired CPU properties are not active. This makes the test fail on rv32. Arrange to skip the test on rv32 instead, moving the rv64 conditional. for gcc/testsuite/ChangeLog * gcc.target/riscv/mcpu-xiangshan-nanhu.c: Skip on non-rv64.
-rw-r--r--gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c b/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c
index 2903c88..c2a374f 100644
--- a/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c
+++ b/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c
@@ -1,6 +1,6 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { rv64 } } } */
/* { dg-skip-if "-march given" { *-*-* } { "-march=*" } } */
-/* { dg-options "-mcpu=xiangshan-nanhu" { target { rv64 } } } */
+/* { dg-options "-mcpu=xiangshan-nanhu" } */
/* XiangShan Nanhu => rv64imafdc_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx_zknd
_zkne_zknh_zksed_zksh_svinval_zicbom_zicboz */