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author | Yuri Rumyantsev <ysrumyan@gmail.com> | 2015-02-26 11:30:03 +0000 |
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committer | Ilya Enkovich <ienkovich@gcc.gnu.org> | 2015-02-26 11:30:03 +0000 |
commit | b24b326283f936111a47350db174620aa1d6115d (patch) | |
tree | 9945950c29f2fdeb20bc06fb4e3345896c9cf5e9 | |
parent | afe006ad4deda8faeb9648913310c819aa250760 (diff) | |
download | gcc-b24b326283f936111a47350db174620aa1d6115d.zip gcc-b24b326283f936111a47350db174620aa1d6115d.tar.gz gcc-b24b326283f936111a47350db174620aa1d6115d.tar.bz2 |
re PR target/65161 (ICE: in vec<_haifa_insn_data, va_heap, vl_embed>::operator[], at vec.h:736 with -O3 -fselective-scheduling2 -mtune=slm)
gcc/
PR target/65161
* config/i386/i386.c (ix86_sched_reorder): Skip instruction
reordering for selective scheduling.
gcc/testsuite/
PR target/65161
* gcc.target/i386/pr65161.c: New test.
From-SVN: r221002
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 6 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr65161.c | 14 |
4 files changed, 30 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1ff9ac6..95d7beb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-02-26 Yuri Rumyantsev <ysrumyan@gmail.com> + + PR target/65161 + * config/i386/i386.c (ix86_sched_reorder): Skip instruction + reordering for selective scheduling. + 2015-02-26 Terry Guo <terry.guo@arm.com> * config/arm/arm-cores.def (cortex-m7): Add flag FL_NO_VOLATILE_CE. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index a1cb5da..bec1324 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -26792,7 +26792,11 @@ ix86_sched_reorder (FILE *dump, int sched_verbose, rtx_insn **ready, ready[n_ready - 1] = insn; return issue_rate; } - if (clock_var != 0 && swap_top_of_ready_list (ready, n_ready)) + + /* Skip selective scheduling since HID is not populated in it. */ + if (clock_var != 0 + && !sel_sched_p () + && swap_top_of_ready_list (ready, n_ready)) { if (sched_verbose > 1) fprintf (dump, ";;\tslm sched_reorder: swap %d and %d insns\n", diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index faece1f..8f88646 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-02-26 Yuri Rumyantsev <ysrumyan@gmail.com> + + PR target/65161 + * gcc.target/i386/pr65161.c: New test. + 2015-02-26 Terry Guo <terry.guo@arm.com> * gcc.target/arm/no-volatile-in-it.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/pr65161.c b/gcc/testsuite/gcc.target/i386/pr65161.c new file mode 100644 index 0000000..3118e94 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr65161.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -fselective-scheduling2 -mtune=slm" } */ + +extern char data_ch[]; + +short +foo () +{ + int i; + short shortsum = 0; + for (i = 0; i < 16; i++) + shortsum += data_ch[i]; + return shortsum; +} |