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| author | yulong <shiyulong@iscas.ac.cn> | 2024-10-29 08:44:45 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2024-10-29 09:46:17 -0600 |
| commit | b22d9c8f8216d15773dee4f9677c6b26aff507fd (patch) | |
| tree | f437329aea9ad7d9ea7f3985fa42843835123bcd | |
| parent | d2c8548e0ce51dac6bc51d37236c50f98fca82f0 (diff) | |
| download | gcc-b22d9c8f8216d15773dee4f9677c6b26aff507fd.zip gcc-b22d9c8f8216d15773dee4f9677c6b26aff507fd.tar.gz gcc-b22d9c8f8216d15773dee4f9677c6b26aff507fd.tar.bz2 | |
[PATCH 2/2] RISC-V:Add intrinsic cases for the CMOs extensions
gcc/testsuite/ChangeLog:
* gcc.target/riscv/cmo-32.c: New test.
* gcc.target/riscv/cmo-64.c: New test.
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/cmo-32.c | 58 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/cmo-64.c | 58 |
2 files changed, 116 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-32.c b/gcc/testsuite/gcc.target/riscv/cmo-32.c new file mode 100644 index 0000000..8e733cc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/cmo-32.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target rv32} */ +/* { dg-options "-march=rv32gc_zicbom_zicbop_zicboz -mabi=ilp32" } */ + +#include "riscv_cmo.h" + +void foo1 (void *addr) +{ + __riscv_cmo_clean(0); + __riscv_cmo_clean(addr); + __riscv_cmo_clean((void*)0x111); +} + +void foo2 (void *addr) +{ + __riscv_cmo_flush(0); + __riscv_cmo_flush(addr); + __riscv_cmo_flush((void*)0x111); +} + +void foo3 (void *addr) +{ + __riscv_cmo_inval(0); + __riscv_cmo_inval(addr); + __riscv_cmo_inval((void*)0x111); +} + +void foo4 (void *addr) +{ + __riscv_cmo_prefetch(addr,0,0); + __riscv_cmo_prefetch(addr,0,1); + __riscv_cmo_prefetch(addr,0,2); + __riscv_cmo_prefetch(addr,0,3); + __riscv_cmo_prefetch(addr,1,0); + __riscv_cmo_prefetch(addr,1,1); + __riscv_cmo_prefetch(addr,1,2); + __riscv_cmo_prefetch(addr,1,3); +} + +int foo5 (int num) +{ + return __riscv_cmo_prefetchi(num); +} + +void foo6 (void *addr) +{ + __riscv_cmo_zero(0); + __riscv_cmo_zero(addr); + __riscv_cmo_zero((void*)0x121); +} + +/* { dg-final { scan-assembler-times "cbo.clean\t" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.flush\t" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.inval\t" 3 } } */ +/* { dg-final { scan-assembler-times "prefetch.r\t" 4 } } */ +/* { dg-final { scan-assembler-times "prefetch.w\t" 4 } } */ +/* { dg-final { scan-assembler-times "prefetch.i\t" 1 } } */ +/* { dg-final { scan-assembler-times "cbo.zero\t" 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/cmo-64.c b/gcc/testsuite/gcc.target/riscv/cmo-64.c new file mode 100644 index 0000000..e83eddb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/cmo-64.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target rv64 } */ +/* { dg-options "-march=rv64gc_zicbom_zicbop_zicboz -mabi=lp64d" } */ + +#include "riscv_cmo.h" + +void foo1 (void *addr) +{ + __riscv_cmo_clean(0); + __riscv_cmo_clean(addr); + __riscv_cmo_clean((void*)0x111); +} + +void foo2 (void *addr) +{ + __riscv_cmo_flush(0); + __riscv_cmo_flush(addr); + __riscv_cmo_flush((void*)0x111); +} + +void foo3 (void *addr) +{ + __riscv_cmo_inval(0); + __riscv_cmo_inval(addr); + __riscv_cmo_inval((void*)0x111); +} + +void foo4 (void *addr) +{ + __riscv_cmo_prefetch(addr,0,0); + __riscv_cmo_prefetch(addr,0,1); + __riscv_cmo_prefetch(addr,0,2); + __riscv_cmo_prefetch(addr,0,3); + __riscv_cmo_prefetch(addr,1,0); + __riscv_cmo_prefetch(addr,1,1); + __riscv_cmo_prefetch(addr,1,2); + __riscv_cmo_prefetch(addr,1,3); +} + +int foo5 (int num) +{ + return __riscv_cmo_prefetchi(num); +} + +void foo6 (void *addr) +{ + __riscv_cmo_zero(0); + __riscv_cmo_zero(addr); + __riscv_cmo_zero((void*)0x121); +} + +/* { dg-final { scan-assembler-times "cbo.clean\t" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.flush\t" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.inval\t" 3 } } */ +/* { dg-final { scan-assembler-times "prefetch.r\t" 4 } } */ +/* { dg-final { scan-assembler-times "prefetch.w\t" 4 } } */ +/* { dg-final { scan-assembler-times "prefetch.i\t" 1 } } */ +/* { dg-final { scan-assembler-times "cbo.zero\t" 3 } } */ |