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| author | Oleg Endo <olegendo@gcc.gnu.org> | 2015-05-26 22:32:11 +0000 |
|---|---|---|
| committer | Kaz Kojima <kkojima@gcc.gnu.org> | 2015-05-26 22:32:11 +0000 |
| commit | afa5920a97b539b111a2f1593717ee7ef14f7bdb (patch) | |
| tree | 428f5c30c29d98a0a40163593f8c5a52bf22a72d | |
| parent | 89d5c50bd125f14c416700f19a4cc963599e9428 (diff) | |
| download | gcc-afa5920a97b539b111a2f1593717ee7ef14f7bdb.zip gcc-afa5920a97b539b111a2f1593717ee7ef14f7bdb.tar.gz gcc-afa5920a97b539b111a2f1593717ee7ef14f7bdb.tar.bz2 | |
re PR target/65979 ([SH] Wrong code is generated with stage1 compiler)
PR target/65979
* config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and take into
account the case that operands[1] and operands[2] are the same register.
From-SVN: r223721
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/sh/sh.md | 9 |
2 files changed, 14 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 69289e6..39d297d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-05-26 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/65979 + * config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and + take into account the case that operands[1] and operands[2] + are the same register. + 2015-05-26 Michael Matz <matz@suse.de> PR middle-end/66251 diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 2d95b9c..634a612 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -14722,7 +14722,11 @@ label: || REGNO (operands[2]) == REGNO (operands[5]))" [(const_int 0)] { - sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3])); + if (REGNO (operands[1]) == REGNO (operands[2])) + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0])); + + sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2], + operands[3]))); emit_insn (gen_tstsi_t (operands[2], gen_rtx_REG (SImode, (REGNO (operands[1]))))); }) @@ -14749,7 +14753,8 @@ label: || REGNO (operands[2]) == REGNO (operands[5]))" [(const_int 0)] { - sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3])); + sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2], + operands[3]))); emit_insn (gen_tstsi_t (operands[2], gen_rtx_REG (SImode, (REGNO (operands[1]))))); }) |