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| author | Andreas Schwab <schwab@suse.de> | 2017-06-20 10:15:47 +0000 |
|---|---|---|
| committer | Andreas Schwab <schwab@gcc.gnu.org> | 2017-06-20 10:15:47 +0000 |
| commit | ad2f2a35d33ea79f95b70f8d96ee1445fabed402 (patch) | |
| tree | c7e7711ac63eedf199d5f4ae62dd02216a12dae4 | |
| parent | d47d743898d2af37ff24bbc6c5b78fb77020bcef (diff) | |
| download | gcc-ad2f2a35d33ea79f95b70f8d96ee1445fabed402.zip gcc-ad2f2a35d33ea79f95b70f8d96ee1445fabed402.tar.gz gcc-ad2f2a35d33ea79f95b70f8d96ee1445fabed402.tar.bz2 | |
re PR target/80970 (internal compiler error in find_reloads, at reload.c:4077)
PR target/80970
* config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d"
instead of "+d".
From-SVN: r249401
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.md | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/torture/pr80970.c | 13 |
3 files changed, 22 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 10434ed..7cb99a6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-06-20 Andreas Schwab <schwab@suse.de> + + PR target/80970 + * config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d" + instead of "+d". + 2017-06-20 Prakhar Bahuguna <prakhar.bahuguna@arm.com> * config/arm/arm-c.c (arm_cpu_builtins): New block to define diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 5bf6c92..7933f8e 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -5337,7 +5337,7 @@ [(set_attr "type" "bitrw")]) (define_insn "*bsetdreg" - [(set (match_operand:SI 0 "register_operand" "+d") + [(set (match_operand:SI 0 "register_operand" "=d") (ior:SI (ashift:SI (const_int 1) (and:SI (match_operand:SI 1 "register_operand" "d") (const_int 31))) @@ -5350,7 +5350,7 @@ [(set_attr "type" "bitrw")]) (define_insn "*bchgdreg" - [(set (match_operand:SI 0 "register_operand" "+d") + [(set (match_operand:SI 0 "register_operand" "=d") (xor:SI (ashift:SI (const_int 1) (and:SI (match_operand:SI 1 "register_operand" "d") (const_int 31))) @@ -5363,7 +5363,7 @@ [(set_attr "type" "bitrw")]) (define_insn "*bclrdreg" - [(set (match_operand:SI 0 "register_operand" "+d") + [(set (match_operand:SI 0 "register_operand" "=d") (and:SI (rotate:SI (const_int -2) (and:SI (match_operand:SI 1 "register_operand" "d") (const_int 31))) diff --git a/gcc/testsuite/gcc.dg/torture/pr80970.c b/gcc/testsuite/gcc.dg/torture/pr80970.c new file mode 100644 index 0000000..3b96b58 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr80970.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ + +int a, b, c, d, e; +void f () +{ + long g, h; + if (c) + e = d; + g = d & 31; + h = 1 << g; + a = e | h; + b = a; +} |