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authorAlexandre Oliva <oliva@adacore.com>2023-01-13 21:15:41 -0300
committerAlexandre Oliva <oliva@gnu.org>2023-01-13 21:15:41 -0300
commitacddf6665f067bc98a2529a699b1d4509a7387cb (patch)
tree227b4f66c644f9021590583a961bf5a317471337
parentccd4df81aa6537c3c935b026905f6e2fd839654e (diff)
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[PR40457] [arm] expand SI-aligned movdi into pair of movsi
When expanding a misaligned DImode move, emit aligned SImode moves if the parts are sufficiently aligned. This enables neighboring stores to be peephole-combined into stm, as expected by the PR40457 testcase, even after SLP vectorizes the originally aligned SImode stores into a misaligned DImode store. for gcc/ChangeLog PR target/40457 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode moves.
-rw-r--r--gcc/config/arm/arm.md12
1 files changed, 10 insertions, 2 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 31dfea1..3710c5c 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -12783,8 +12783,16 @@
rtx hi_op0 = gen_highpart_mode (SImode, DImode, operands[0]);
rtx hi_op1 = gen_highpart_mode (SImode, DImode, operands[1]);
- emit_insn (gen_movmisalignsi (lo_op0, lo_op1));
- emit_insn (gen_movmisalignsi (hi_op0, hi_op1));
+ if (aligned_operand (lo_op0, SImode) && aligned_operand (lo_op1, SImode))
+ {
+ emit_move_insn (lo_op0, lo_op1);
+ emit_move_insn (hi_op0, hi_op1);
+ }
+ else
+ {
+ emit_insn (gen_movmisalignsi (lo_op0, lo_op1));
+ emit_insn (gen_movmisalignsi (hi_op0, hi_op1));
+ }
DONE;
})