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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2025-09-01 00:18:18 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2025-09-01 00:18:18 +0000 |
| commit | a954b961d58936f014333133f22004acba05384f (patch) | |
| tree | 411654a4da0c7638f4d6842d6c8dbde66d8d4e2f | |
| parent | 4553eccd23d74ba9ad2f862c5e66278a21abfe49 (diff) | |
| download | gcc-a954b961d58936f014333133f22004acba05384f.zip gcc-a954b961d58936f014333133f22004acba05384f.tar.gz gcc-a954b961d58936f014333133f22004acba05384f.tar.bz2 | |
Daily bump.
| -rw-r--r-- | gcc/ChangeLog | 17 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/fortran/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 36 | ||||
| -rw-r--r-- | libstdc++-v3/ChangeLog | 13 |
5 files changed, 77 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8acecd8..0f76295 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2025-08-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> + + * config/xtensa/predicates.md (alt_ubranch_operator): + New predicate. + * config/xtensa/xtensa.md (*eqne_in_range): + New insn_and_split pattern. + +2025-08-31 Shreya Munnangi <smunnangi1@ventanamicro.com> + + * config/riscv/riscv-protos.h (synthesize_add_extended): Prototype. + * config/riscv/riscv.cc (synthesize_add_extended): New function. + * config/riscv/riscv.md (addsi3): For RV64, try synthesize_add_extended. + +2025-08-31 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/install.texi (Binaries): Drop MinGW. + 2025-08-30 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/121698 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 054cb6a..d9ea012 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20250831 +20250901 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 8f1e900..12c8712 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,13 @@ +2025-08-31 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/99709 + * trans-array.cc (structure_alloc_comps): For the case + COPY_ALLOC_COMP, do a deep copy of non-allocatable PDT arrays + Suppress the use of 'duplicate_allocatable' for PDT arrays. + * trans-expr.cc (conv_dummy_value): When passing to a PDT dummy + with the VALUE attribute, do a deep copy to ensure that + parameterized components are reallocated. + 2025-08-29 Harald Anlauf <anlauf@gmx.de> PR fortran/93330 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c6dace4..784d564 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,39 @@ +2025-08-31 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/99709 + * gfortran.dg/pdt_41.f03: New test. + +2025-08-31 Shreya Munnangi <smunnangi1@ventanamicro.com> + + * gcc.target/riscv/add-synthesis-2.c: New test. + +2025-08-31 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/sat/sat_arith.h: Add test helper macros. + * gcc.target/riscv/sat/sat_u_mul-5-u16-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u16-from-u32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u16-from-u64.rv32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u16-from-u64.rv64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u32-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u32-from-u64.rv32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u32-from-u64.rv64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u64-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u8-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u8-from-u16.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u8-from-u32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u8-from-u64.rv32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-5-u8-from-u64.rv64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u16-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u16-from-u32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u16-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u32-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u32-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u64-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u128.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u16.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u64.c: New test. + 2025-08-30 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/121698 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index eb0f8ca..3dc057e 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,16 @@ +2025-08-31 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/xml/manual/using_exceptions.xml: Update link to + Boost's "Exception-Safety" + * doc/html/manual/using_exceptions.html: Rebuild. + +2025-08-31 Jonathan Wakely <jwakely@redhat.com> + + * src/c++26/debugging.cc [_GLIBCXX_HAVE_SYS_PTRACE_H]: Include + <sys/types.h>. + (breakpoint) [__i386__ || __x86_64__]: Use "int 0x03" instead of + "int3". + 2025-08-28 Jonathan Wakely <jwakely@redhat.com> PR libstdc++/119670 |