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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-04-21 00:16:48 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-04-21 00:16:48 +0000 |
| commit | a7d01a715185a159a334d40d8464d6e8bc35f7f5 (patch) | |
| tree | d722a8554f8a7b147a87c7e356ed7291a5eae97d | |
| parent | 3afcb04bd7d444b4c6547ad98668c2a6a7f37a21 (diff) | |
| download | gcc-a7d01a715185a159a334d40d8464d6e8bc35f7f5.zip gcc-a7d01a715185a159a334d40d8464d6e8bc35f7f5.tar.gz gcc-a7d01a715185a159a334d40d8464d6e8bc35f7f5.tar.bz2 | |
Daily bump.
| -rw-r--r-- | gcc/ChangeLog | 26 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/m2/ChangeLog | 17 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 47 |
4 files changed, 91 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 72c7420..ba1f88e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,29 @@ +2024-04-20 Pan Li <pan2.li@intel.com> + + Revert: + 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/112431 + * config/riscv/vector.md: Fix incorrect overlap in v0. + +2024-04-20 Pan Li <pan2.li@intel.com> + + Revert: + 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/112431 + * config/riscv/vector.md: Support highest overlap for wv instructions. + +2024-04-20 Pan Li <pan2.li@intel.com> + + Revert: + 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/112432 + * config/riscv/riscv.md (none,W21,W42,W84,W43,W86,W87): Add W0. + (none,W21,W42,W84,W43,W86,W87,W0): Ditto. + * config/riscv/vector.md: Ditto. + 2024-04-19 Jakub Jelinek <jakub@redhat.com> PR target/114783 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 0cfd258..b0f1eca 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240420 +20240421 diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog index 2b0ad18..1ef9df9 100644 --- a/gcc/m2/ChangeLog +++ b/gcc/m2/ChangeLog @@ -1,3 +1,20 @@ +2024-04-20 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/112893 + * gm2-compiler/M2Check.mod (GetProcedureProcType): Import. + (getType): Return value using GetProcedureProcType if sym is a + procedure. + * gm2-compiler/M2Range.mod (FoldTypeExpr): Remove quad if + expression is type compatible. + * gm2-compiler/SymbolTable.def (GetProcedureProcType): New + procedure function. + * gm2-compiler/SymbolTable.mod (Procedure): Add ProcedureType. + (MakeProcedure): Initialize ProcedureType. + (PutParam): Call AddProcedureProcTypeParam. + (PutVarParam): Call AddProcedureProcTypeParam. + (AddProcedureProcTypeParam): New procedure. + (GetProcedureProcType): New procedure function. + 2024-04-16 Gaius Mulley <gaiusmod2@gmail.com> PR modula2/114745 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2576207..8ab813f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,50 @@ +2024-04-20 Pan Li <pan2.li@intel.com> + + Revert: + 2024-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/112431 + * gcc.target/riscv/rvv/base/pr112431-34.c: New test. + +2024-04-20 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/112893 + * gm2/pim/pass/another.mod: Correct bug exposed by type checker. + Swap ProcA and ProcB assignments. + * gm2/pim/pass/proccard.mod: Use VAL to convert procedure into a + cardinal. + * gm2/iso/const/fail/castproctype.mod: New test. + * gm2/pim/fail/badproctype.mod: New test. + +2024-04-20 Pan Li <pan2.li@intel.com> + + * gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c: Xfail csr check. + * gcc.target/riscv/rvv/base/pr112431-39.c: New test. + * gcc.target/riscv/rvv/base/pr112431-40.c: New test. + * gcc.target/riscv/rvv/base/pr112431-41.c: New test. + +2024-04-20 Pan Li <pan2.li@intel.com> + + Revert: + 2024-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/112431 + * gcc.target/riscv/rvv/base/pr112431-39.c: New test. + * gcc.target/riscv/rvv/base/pr112431-40.c: New test. + * gcc.target/riscv/rvv/base/pr112431-41.c: New test. + +2024-04-20 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/base/pr112431-42.c: New test. + +2024-04-20 Pan Li <pan2.li@intel.com> + + Revert: + 2024-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/112432 + * gcc.target/riscv/rvv/base/pr112432-42.c: New test. + 2024-04-19 Jakub Jelinek <jakub@redhat.com> PR target/114783 |