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authorAdam Nemet <anemet@caviumnetworks.com>2008-11-22 17:02:14 +0000
committerAdam Nemet <nemet@gcc.gnu.org>2008-11-22 17:02:14 +0000
commit9d50ba211c7363f3f693a33a0000219af56fc46e (patch)
tree5ed24b295e7aa23f7b132d59758a74c69fa8d77a
parente548e2c0f29bc87b9a060526897e2fadb6a8a06d (diff)
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mips.md (rdhwr): Rename to rdhwr_synci_step_<mode>.
* config/mips/mips.md (rdhwr): Rename to rdhwr_synci_step_<mode>. Use constant 1 as the operand. * config/mips/mips.c (mips_expand_synci_loop): Make INC Pmode. Rename gen_rdhwr to gen_rdhwr_synci_step_si or gen_rdhwr_synci_step_di depending on the size of Pmode. From-SVN: r142123
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/mips/mips.c6
-rw-r--r--gcc/config/mips/mips.md8
3 files changed, 16 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7717db98..68b6414 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2008-11-22 Adam Nemet <anemet@caviumnetworks.com>
+
+ * config/mips/mips.md (rdhwr): Rename to rdhwr_synci_step_<mode>.
+ Use constant 1 as the operand.
+ * config/mips/mips.c (mips_expand_synci_loop): Make INC Pmode.
+ Rename gen_rdhwr to gen_rdhwr_synci_step_si or
+ gen_rdhwr_synci_step_di depending on the size of Pmode.
+
2008-11-22 Uros Bizjak <ubizjak@gmail.com>
PR target/38222
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index c868b10..c7b3c06 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -6401,8 +6401,10 @@ mips_expand_synci_loop (rtx begin, rtx end)
rtx inc, label, cmp, cmp_result;
/* Load INC with the cache line size (rdhwr INC,$1). */
- inc = gen_reg_rtx (SImode);
- emit_insn (gen_rdhwr (inc, const1_rtx));
+ inc = gen_reg_rtx (Pmode);
+ emit_insn (Pmode == SImode
+ ? gen_rdhwr_synci_step_si (inc)
+ : gen_rdhwr_synci_step_di (inc));
/* Loop back to here. */
label = gen_label_rtx ();
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 22fcc88..046f6a7 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4725,12 +4725,12 @@
"ISA_HAS_SYNCI"
"synci\t0(%0)")
-(define_insn "rdhwr"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (unspec_volatile [(match_operand:SI 1 "const_int_operand" "n")]
+(define_insn "rdhwr_synci_step_<mode>"
+ [(set (match_operand:P 0 "register_operand" "=d")
+ (unspec_volatile [(const_int 1)]
UNSPEC_RDHWR))]
"ISA_HAS_SYNCI"
- "rdhwr\t%0,$%1")
+ "rdhwr\t%0,$1")
(define_insn "clear_hazard"
[(unspec_volatile [(const_int 0)] UNSPEC_CLEAR_HAZARD)