Support for 64-bit location_t: Backend parts

A few targets have been using "unsigned int" function arguments that need to
receive a "location_t". Change to "location_t" to prepare for the
possibility that location_t can be configured to be a different type.

gcc/ChangeLog:

	* config/aarch64/aarch64-c.cc (aarch64_resolve_overloaded_builtin):
	Change "unsigned int" argument to "location_t".
	* config/avr/avr-c.cc (avr_resolve_overloaded_builtin): Likewise.
	* config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): Likewise.
	* target.def: Likewise.
	* doc/tm.texi: Regenerate.

5 files changed, 5 insertions, 8 deletions

diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc
index 3cc2c97..dba103a 100644
--- a/gcc/config/aarch64/aarch64-c.cc
+++ b/gcc/config/aarch64/aarch64-c.cc
@@ -382,11 +382,10 @@ aarch64_pragma_aarch64 (cpp_reader *)
 
 /* Implement TARGET_RESOLVE_OVERLOADED_BUILTIN.  */
 static tree
-aarch64_resolve_overloaded_builtin (unsigned int uncast_location,
+aarch64_resolve_overloaded_builtin (location_t location,
 				    tree fndecl, void *uncast_arglist)
 {
   vec<tree, va_gc> empty = {};
-  location_t location = (location_t) uncast_location;
   vec<tree, va_gc> *arglist = (uncast_arglist
 			       ? (vec<tree, va_gc> *) uncast_arglist
 			       : &empty);
diff --git a/gcc/config/avr/avr-c.cc b/gcc/config/avr/avr-c.cc
index 7db88a8..5d7dad5 100644
--- a/gcc/config/avr/avr-c.cc
+++ b/gcc/config/avr/avr-c.cc
@@ -48,11 +48,10 @@ enum avr_builtin_id
 /* Implement `TARGET_RESOLVE_OVERLOADED_PLUGIN'.  */
 
 static tree
-avr_resolve_overloaded_builtin (unsigned int iloc, tree fndecl, void *vargs)
+avr_resolve_overloaded_builtin (location_t loc, tree fndecl, void *vargs)
 {
   tree type0, type1, fold = NULL_TREE;
   avr_builtin_id id = AVR_BUILTIN_COUNT;
-  location_t loc = (location_t) iloc;
   vec<tree, va_gc> &args = * (vec<tree, va_gc> *) vargs;
 
   switch (DECL_MD_FUNCTION_CODE (fndecl))
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index c59f408..7f78e2c 100644
--- a/gcc/config/riscv/riscv-c.cc
+++ b/gcc/config/riscv/riscv-c.cc
@@ -312,11 +312,10 @@ riscv_check_builtin_call (location_t loc, vec<location_t> arg_loc, tree fndecl,
 
 /* Implement TARGET_RESOLVE_OVERLOADED_BUILTIN.  */
 static tree
-riscv_resolve_overloaded_builtin (unsigned int uncast_location, tree fndecl,
+riscv_resolve_overloaded_builtin (location_t loc, tree fndecl,
 				  void *uncast_arglist)
 {
   vec<tree, va_gc> empty = {};
-  location_t loc = (location_t) uncast_location;
   vec<tree, va_gc> *arglist = (vec<tree, va_gc> *) uncast_arglist;
   unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
   unsigned int subcode = code >> RISCV_BUILTIN_SHIFT;
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 05f85f8..64f9d78 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -12131,7 +12131,7 @@ ignored.  This function should return the result of the call to the
 built-in function.
 @end deftypefn
 
-@deftypefn {Target Hook} tree TARGET_RESOLVE_OVERLOADED_BUILTIN (unsigned int @var{loc}, tree @var{fndecl}, void *@var{arglist})
+@deftypefn {Target Hook} tree TARGET_RESOLVE_OVERLOADED_BUILTIN (location_t @var{loc}, tree @var{fndecl}, void *@var{arglist})
 Select a replacement for a machine specific built-in function that
 was set up by @samp{TARGET_INIT_BUILTINS}.  This is done
 @emph{before} regular type checking, and so allows the target to
diff --git a/gcc/target.def b/gcc/target.def
index cda3d4f..413fed9 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -2497,7 +2497,7 @@ arguments passed to the built-in function.  The result is a\n\
 complete expression that implements the operation, usually\n\
 another @code{CALL_EXPR}.\n\
 @var{arglist} really has type @samp{VEC(tree,gc)*}",
- tree, (unsigned int /*location_t*/ loc, tree fndecl, void *arglist), NULL)
+ tree, (location_t loc, tree fndecl, void *arglist), NULL)
 
 DEFHOOK
 (check_builtin_call,