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| author | Uros Bizjak <uros@gcc.gnu.org> | 2019-09-16 20:44:55 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2019-09-16 20:44:55 +0200 |
| commit | 9b47928e633f8f84db4cd6f863e3ea01c3ce63bb (patch) | |
| tree | 457f149eac998bf57de8860a99b4a433a80ed0bf | |
| parent | 48d552e5cd56ff3212d050efca3d5f34778af79f (diff) | |
| download | gcc-9b47928e633f8f84db4cd6f863e3ea01c3ce63bb.zip gcc-9b47928e633f8f84db4cd6f863e3ea01c3ce63bb.tar.gz gcc-9b47928e633f8f84db4cd6f863e3ea01c3ce63bb.tar.bz2 | |
* config/i386/sync.md (atomic_store<mode>): Improve comment.
From-SVN: r275755
| -rw-r--r-- | gcc/config/i386/sync.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index 2614ddb..189fee2 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -306,8 +306,8 @@ { operands[1] = force_reg (<MODE>mode, operands[1]); - /* For seq-cst stores, use XCHG - when we lack MFENCE or when target prefers XCHG. */ + /* For seq-cst stores, use XCHG when we lack MFENCE + or when target prefers XCHG. */ if (is_mm_seq_cst (model) && (!(TARGET_64BIT || TARGET_SSE2) || TARGET_USE_XCHG_FOR_ATOMIC_STORE)) |