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authorJames Greenhalgh <james.greenhalgh@arm.com>2014-03-19 15:47:59 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2014-03-19 15:47:59 +0000
commit985e0d33885687d667c5f2c95de12f77d9281bf1 (patch)
tree2dee9538895610f27ab230df70c4d6e8c8c6ca4e
parentce2f49b3bf9fa7ca16ab1162b1ad231287e0067c (diff)
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[ARM] [Trivial] Fix shortening of field name extend.
gcc/ * config/arm/aarch-common-protos.h (alu_cost_table): Fix spelling of "extend". * config/arm/arm.c (arm_new_rtx_costs): Fix spelling of "extend". From-SVN: r208683
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/aarch-common-protos.h4
-rw-r--r--gcc/config/arm/arm.c6
3 files changed, 11 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 23d60ec..78a4071 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-03-19 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/arm/aarch-common-protos.h
+ (alu_cost_table): Fix spelling of "extend".
+ * config/arm/arm.c (arm_new_rtx_costs): Fix spelling of "extend".
+
2014-03-19 Richard Biener <rguenther@suse.de>
PR middle-end/60553
diff --git a/gcc/config/arm/aarch-common-protos.h b/gcc/config/arm/aarch-common-protos.h
index 056fe56..a5ff6b4 100644
--- a/gcc/config/arm/aarch-common-protos.h
+++ b/gcc/config/arm/aarch-common-protos.h
@@ -48,8 +48,8 @@ struct alu_cost_table
const int arith_shift_reg; /* ... and when the shift is by a reg. */
const int log_shift; /* Additional when logic also shifts... */
const int log_shift_reg; /* ... and when the shift is by a reg. */
- const int extnd; /* Zero/sign extension. */
- const int extnd_arith; /* Extend and arith. */
+ const int extend; /* Zero/sign extension. */
+ const int extend_arith; /* Extend and arith. */
const int bfi; /* Bit-field insert. */
const int bfx; /* Bit-field extraction. */
const int clz; /* Count Leading Zeros. */
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a68ed8d..31df089 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -9594,7 +9594,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
{
/* UXTA[BH] or SXTA[BH]. */
if (speed_p)
- *cost += extra_cost->alu.extnd_arith;
+ *cost += extra_cost->alu.extend_arith;
*cost += (rtx_cost (XEXP (XEXP (x, 0), 0), ZERO_EXTEND, 0,
speed_p)
+ rtx_cost (XEXP (x, 1), PLUS, 0, speed_p));
@@ -10311,7 +10311,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
*cost = COSTS_N_INSNS (1);
*cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
if (speed_p)
- *cost += extra_cost->alu.extnd;
+ *cost += extra_cost->alu.extend;
}
else if (GET_MODE (XEXP (x, 0)) != SImode)
{
@@ -10364,7 +10364,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
*cost = COSTS_N_INSNS (1);
*cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
if (speed_p)
- *cost += extra_cost->alu.extnd;
+ *cost += extra_cost->alu.extend;
}
else if (GET_MODE (XEXP (x, 0)) != SImode)
{