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author | Alan Modra <amodra@bigpond.net.au> | 2004-01-07 01:21:28 +0000 |
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committer | Alan Modra <amodra@gcc.gnu.org> | 2004-01-07 11:51:28 +1030 |
commit | 93c9d1bae65fbd6727217cd6532d54e5a5f5049f (patch) | |
tree | 0a779d7f74887116be994fc67249d990faf6e805 | |
parent | deae8de66442e0a9017623080d5bcea5cf86dddf (diff) | |
download | gcc-93c9d1bae65fbd6727217cd6532d54e5a5f5049f.zip gcc-93c9d1bae65fbd6727217cd6532d54e5a5f5049f.tar.gz gcc-93c9d1bae65fbd6727217cd6532d54e5a5f5049f.tar.bz2 |
rs6000.c (rs6000_dbx_register_number): New function.
* config/rs6000/rs6000.c (rs6000_dbx_register_number): New function.
* config/rs6000/rs6000-protos.h (rs6000_dbx_register_number): Declare.
* config/rs6000/rs6000.h (DWARF_FRAME_REGNUM): Define.
(DWARF_REG_TO_UNWIND_COLUMN): Correct column adjustment and comment.
* config/rs6000/sysv4.h (DBX_REGISTER_NUMBER): Define.
From-SVN: r75497
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000-protos.h | 4 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 37 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.h | 32 | ||||
-rw-r--r-- | gcc/config/rs6000/sysv4.h | 6 |
5 files changed, 71 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d9c9b30..237207a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2004-01-07 Alan Modra <amodra@bigpond.net.au> + + * config/rs6000/rs6000.c (rs6000_dbx_register_number): New function. + * config/rs6000/rs6000-protos.h (rs6000_dbx_register_number): Declare. + * config/rs6000/rs6000.h (DWARF_FRAME_REGNUM): Define. + (DWARF_REG_TO_UNWIND_COLUMN): Correct column adjustment and comment. + * config/rs6000/sysv4.h (DBX_REGISTER_NUMBER): Define. + 2004-01-06 Eric Christopher <echristo@redhat.com> * config/mips/mips.h (MDEBUG_ASM_SPEC): Change for dwarf2 default. diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 79679f4..b034193 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -1,5 +1,6 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000. - Copyright (C) 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright (C) 2000, 2001, 2002, 2003, 2004 + Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GCC. @@ -186,6 +187,7 @@ extern int uses_TOC (void); extern void rs6000_emit_prologue (void); extern void rs6000_emit_load_toc_table (int); extern void rs6000_aix_emit_builtin_unwind_init (void); +extern unsigned int rs6000_dbx_register_number (unsigned int); extern void rs6000_emit_epilogue (int); extern void rs6000_emit_eh_reg_restore (rtx, rtx); extern const char * output_isel (rtx *); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index f8037c0..bda0777 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1,6 +1,6 @@ /* Subroutines used for code generation on IBM RS/6000. Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GCC. @@ -15763,4 +15763,39 @@ rs6000_dwarf_register_span (rtx reg) gen_rtx_REG (SImode, regno + 1200))); } +/* Map internal gcc register numbers to DWARF2 register numbers. */ + +unsigned int +rs6000_dbx_register_number (unsigned int regno) +{ + if (regno <= 63 || write_symbols != DWARF2_DEBUG) + return regno; + if (regno == MQ_REGNO) + return 100; + if (regno == LINK_REGISTER_REGNUM) + return 108; + if (regno == COUNT_REGISTER_REGNUM) + return 109; + if (CR_REGNO_P (regno)) + return regno - CR0_REGNO + 86; + if (regno == XER_REGNO) + return 101; + if (ALTIVEC_REGNO_P (regno)) + return regno - FIRST_ALTIVEC_REGNO + 1124; + if (regno == VRSAVE_REGNO) + return 356; + if (regno == VSCR_REGNO) + return 67; + if (regno == SPE_ACC_REGNO) + return 99; + if (regno == SPEFSCR_REGNO) + return 612; + /* SPE high reg number. We get these values of regno from + rs6000_dwarf_register_span. */ + if (regno >= 1200 && regno < 1232) + return regno; + + abort (); +} + #include "gt-rs6000.h" diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 3b14ce6..722fc84 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GCC. @@ -811,19 +811,27 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops; /* This must be included for pre gcc 3.0 glibc compatibility. */ #define PRE_GCC3_DWARF_FRAME_REGISTERS 77 -/* Add 32 dwarf columns for synthetic SPE registers. The SPE - synthetic registers are 113 through 145. */ +/* Add 32 dwarf columns for synthetic SPE registers. */ #define DWARF_FRAME_REGISTERS (FIRST_PSEUDO_REGISTER + 32) -/* The SPE has an additional 32 synthetic registers starting at 1200. - We must map them here to sane values in the unwinder to avoid a - huge hole in the unwind tables. - - FIXME: the AltiVec ABI has AltiVec registers being 1124-1155, and - the VRSAVE SPR (SPR256) assigned to register 356. When AltiVec EH - is verified to be working, this macro should be changed - accordingly. */ -#define DWARF_REG_TO_UNWIND_COLUMN(r) ((r) > 1200 ? ((r) - 1200 + 113) : (r)) +/* The SPE has an additional 32 synthetic registers, with DWARF debug + info numbering for these registers starting at 1200. While eh_frame + register numbering need not be the same as the debug info numbering, + we choose to number these regs for eh_frame at 1200 too. This allows + future versions of the rs6000 backend to add hard registers and + continue to use the gcc hard register numbering for eh_frame. If the + extra SPE registers in eh_frame were numbered starting from the + current value of FIRST_PSEUDO_REGISTER, then if FIRST_PSEUDO_REGISTER + changed we'd need to introduce a mapping in DWARF_FRAME_REGNUM to + avoid invalidating older SPE eh_frame info. + + We must map them here to avoid huge unwinder tables mostly consisting + of unused space. */ +#define DWARF_REG_TO_UNWIND_COLUMN(r) \ + ((r) > 1200 ? ((r) - 1200 + FIRST_PSEUDO_REGISTER) : (r)) + +/* Use gcc hard register numbering for eh_frame. */ +#define DWARF_FRAME_REGNUM(REGNO) (REGNO) /* 1 for registers that have pervasive standard uses and are not available for the register allocator. diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h index a49a1ca..20e7c9a 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h @@ -1,6 +1,6 @@ /* Target definitions for GNU compiler for PowerPC running System V.4 - Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GCC. @@ -742,6 +742,8 @@ extern int fixuplabelno; /* Historically we have also supported stabs debugging. */ #define DBX_DEBUGGING_INFO 1 +#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO) + #define TARGET_ENCODE_SECTION_INFO rs6000_elf_encode_section_info #define TARGET_IN_SMALL_DATA_P rs6000_elf_in_small_data_p #define TARGET_SECTION_TYPE_FLAGS rs6000_elf_section_type_flags |