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| author | Xi Ruoyao <xry111@xry111.site> | 2024-12-02 14:48:24 +0800 |
|---|---|---|
| committer | Xi Ruoyao <xry111@xry111.site> | 2024-12-18 16:43:33 +0800 |
| commit | 8e47615f24b9fdebf14e270e6131cea6a67f1b04 (patch) | |
| tree | 4da9a15f56124d454703a49ec95fccdd98645ae7 | |
| parent | e1937cf33abded5c6ebbe4938a4a3e8cb3365176 (diff) | |
| download | gcc-8e47615f24b9fdebf14e270e6131cea6a67f1b04.zip gcc-8e47615f24b9fdebf14e270e6131cea6a67f1b04.tar.gz gcc-8e47615f24b9fdebf14e270e6131cea6a67f1b04.tar.bz2 | |
LoongArch: Remove QHSD and use QHWD instead
QHSD and QHWD are basically the same thing, but QHSD will be incorrect
when we start to add LA32 support. So it's just better to always use
QHWD.
gcc/ChangeLog:
* config/loongarch/loongarch.md (QHSD): Remove.
(loongarch_<crc>_w_<size>_w): Use QHSD instead of QHWD.
(loongarch_<crc>_w_<size>_w_extended): Likewise.
| -rw-r--r-- | gcc/config/loongarch/loongarch.md | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index a65cc1d..bf32224 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -4345,13 +4345,12 @@ -(define_mode_iterator QHSD [QI HI SI DI]) (define_int_iterator CRC [UNSPEC_CRC UNSPEC_CRCC]) (define_int_attr crc [(UNSPEC_CRC "crc") (UNSPEC_CRCC "crcc")]) (define_insn "loongarch_<crc>_w_<size>_w" [(set (match_operand:SI 0 "register_operand" "=r") - (unspec:SI [(match_operand:QHSD 1 "register_operand" "r") + (unspec:SI [(match_operand:QHWD 1 "register_operand" "r") (match_operand:SI 2 "register_operand" "r")] CRC))] "" @@ -4362,7 +4361,7 @@ (define_insn "loongarch_<crc>_w_<size>_w_extended" [(set (match_operand:DI 0 "register_operand" "=r") (sign_extend:DI - (unspec:SI [(match_operand:QHSD 1 "register_operand" "r") + (unspec:SI [(match_operand:QHWD 1 "register_operand" "r") (match_operand:SI 2 "register_operand" "r")] CRC)))] "TARGET_64BIT" |