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| author | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2020-10-20 11:26:20 +0100 |
|---|---|---|
| committer | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2020-10-20 11:26:56 +0100 |
| commit | 8c3846e80210ba437644b5b91d9bd9c564ca565a (patch) | |
| tree | 3647b7eb797aeddc8106adbbef5001051fec46f3 | |
| parent | b3032d1b84b8ab683f2d7345b6a2d9f783fe946d (diff) | |
| download | gcc-8c3846e80210ba437644b5b91d9bd9c564ca565a.zip gcc-8c3846e80210ba437644b5b91d9bd9c564ca565a.tar.gz gcc-8c3846e80210ba437644b5b91d9bd9c564ca565a.tar.bz2 | |
MSP430: Support a memory operand for op1 of andneghi3
This fixes an ICE caused by an unrecognizeable insn generated when
compiling gcc.c-torture/execute/pr97386-1.c at -O0.
gcc/ChangeLog:
* config/msp430/msp430.md (andneghi3): Allow general operand for
op1 and update output assembler template.
| -rw-r--r-- | gcc/config/msp430/msp430.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index f70e61b..ad244bb 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -1346,12 +1346,12 @@ ;; instructions, so we provide a pattern to support it here. (define_insn "andneghi3" [(set (match_operand:HI 0 "register_operand" "=r") - (and:HI (neg:HI (match_operand:HI 1 "register_operand" "r")) + (and:HI (neg:HI (match_operand:HI 1 "general_operand" "rm")) (match_operand 2 "immediate_operand" "n")))] "" "* if (REGNO (operands[0]) != REGNO (operands[1])) - return \"MOV.W\t%1, %0 { INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\"; + return \"MOV%X1.W\t%1, %0 { INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\"; else return \"INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\"; " |