i386.md (QImode and HImode cmove splitters): Merge QImode and HImode splitters.

	* config/i386/i386.md (QImode and HImode cmove splitters): Merge
	QImode and HImode splitters.  Use ix86_comparison_operator.
	Explicitly match FLAGS_REG.
	(DFmode cmove splitter): Explicitly match FLAGS_REG.

From-SVN: r189440

2 files changed, 34 insertions, 43 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d3bbb5a..2eb783b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2012-07-12  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (QImode and HImode cmove splitters): Merge
+	QImode and HImode splitters.  Use ix86_comparison_operator.
+	Explicitly match FLAGS_REG.
+	(DFmode cmove splitter): Explicitly match FLAGS_REG.
+
 2012-07-11  Steven Bosscher  <steven@gcc.gnu.org>
 
 	* expr.h (can_move_by_pieces): Move prototype from here ...
@@ -55,7 +62,7 @@
 	* gimplify.c (gimplify_bind_expr): Control
 	clobber generation with new option.
 	(gimplify_target_expr): Ditto.
-	common.opt: New option.
+	* common.opt: New option.
 
 2012-07-10  Julian Brown  <julian@codesourcery.com>
 
@@ -167,8 +174,7 @@
 	(gimple_phi_arg_has_block): New function.
 	(redirect_edge_var_map_block): New function.
 	* tree-flow.h (_edge_var_map): New field.
-	* tree-ssa-live.c (remove_unused_locals): Mark phi_arg's block
-	as used.
+	* tree-ssa-live.c (remove_unused_locals): Mark phi_arg's block as used.
 	* tree-eh.c (cleanup_empty_eh_merge_phis): Add block debug info for
 	redirect_edge_var_map_add.
 	* tree-outof-ssa.c (_elim_graph): New field.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b88db5b..f1eec78 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -16372,25 +16372,34 @@
   [(set_attr "type" "icmov")
    (set_attr "mode" "<MODE>")])
 
-(define_insn_and_split "*movqicc_noc"
+(define_insn "*movqicc_noc"
   [(set (match_operand:QI 0 "register_operand" "=r,r")
 	(if_then_else:QI (match_operator 1 "ix86_comparison_operator"
-			   [(match_operand 4 "flags_reg_operand")
-			    (const_int 0)])
+			   [(reg FLAGS_REG) (const_int 0)])
 		      (match_operand:QI 2 "register_operand" "r,0")
 		      (match_operand:QI 3 "register_operand" "0,r")))]
   "TARGET_CMOVE && !TARGET_PARTIAL_REG_STALL"
   "#"
-  "&& reload_completed"
-  [(set (match_dup 0)
-	(if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  "operands[0] = gen_lowpart (SImode, operands[0]);
-   operands[2] = gen_lowpart (SImode, operands[2]);
-   operands[3] = gen_lowpart (SImode, operands[3]);"
   [(set_attr "type" "icmov")
-   (set_attr "mode" "SI")])
+   (set_attr "mode" "QI")])
+
+(define_split
+  [(set (match_operand 0 "register_operand")
+	(if_then_else (match_operator 1 "ix86_comparison_operator"
+			[(reg FLAGS_REG) (const_int 0)])
+		      (match_operand 2 "register_operand")
+		      (match_operand 3 "register_operand")))]
+  "TARGET_CMOVE && !TARGET_PARTIAL_REG_STALL
+   && (GET_MODE (operands[0]) == QImode
+       || GET_MODE (operands[0]) == HImode)
+   && reload_completed"
+  [(set (match_dup 0)
+	(if_then_else:SI (match_dup 1) (match_dup 2) (match_dup 3)))]
+{
+  operands[0] = gen_lowpart (SImode, operands[0]);
+  operands[2] = gen_lowpart (SImode, operands[2]);
+  operands[3] = gen_lowpart (SImode, operands[3]);
+})
 
 (define_expand "mov<mode>cc"
   [(set (match_operand:X87MODEF 0 "register_operand")
@@ -16450,21 +16459,16 @@
 (define_split
   [(set (match_operand:DF 0 "register_and_not_any_fp_reg_operand")
 	(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
-				[(match_operand 4 "flags_reg_operand")
-				 (const_int 0)])
+				[(reg FLAGS_REG) (const_int 0)])
 		      (match_operand:DF 2 "nonimmediate_operand")
 		      (match_operand:DF 3 "nonimmediate_operand")))]
   "!TARGET_64BIT && reload_completed"
   [(set (match_dup 2)
-	(if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)])
-		      (match_dup 5)
-		      (match_dup 6)))
+	(if_then_else:SI (match_dup 1) (match_dup 4) (match_dup 5)))
    (set (match_dup 3)
-	(if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)])
-		      (match_dup 7)
-		      (match_dup 8)))]
+	(if_then_else:SI (match_dup 1) (match_dup 6) (match_dup 7)))]
 {
-  split_double_mode (DImode, &operands[2], 2, &operands[5], &operands[7]);
+  split_double_mode (DImode, &operands[2], 2, &operands[4], &operands[6]);
   split_double_mode (DImode, &operands[0], 1, &operands[2], &operands[3]);
 })
 
@@ -16871,25 +16875,6 @@
   operands[0] = gen_lowpart (SImode, operands[0]);
   operands[1] = gen_lowpart (SImode, operands[1]);
 })
-
-(define_split
-  [(set (match_operand 0 "register_operand")
-	(if_then_else (match_operator 1 "ordered_comparison_operator"
-				[(reg FLAGS_REG) (const_int 0)])
-		      (match_operand 2 "register_operand")
-		      (match_operand 3 "register_operand")))]
-  "! TARGET_PARTIAL_REG_STALL && TARGET_CMOVE
-   && (GET_MODE (operands[0]) == HImode
-       || (GET_MODE (operands[0]) == QImode
-	   && (TARGET_PROMOTE_QImode
-	       || optimize_insn_for_size_p ())))"
-  [(set (match_dup 0)
-	(if_then_else:SI (match_dup 1) (match_dup 2) (match_dup 3)))]
-{
-  operands[0] = gen_lowpart (SImode, operands[0]);
-  operands[2] = gen_lowpart (SImode, operands[2]);
-  operands[3] = gen_lowpart (SImode, operands[3]);
-})
 
 ;; RTL Peephole optimizations, run before sched2.  These primarily look to
 ;; transform a complex memory operation into two memory to register operations.