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authorMichael Meissner <meissner@linux.vnet.ibm.com>2010-03-24 20:59:24 +0000
committerMichael Meissner <meissner@gcc.gnu.org>2010-03-24 20:59:24 +0000
commit871c9abbb8b6adf07424fa0c2259edc2b709e906 (patch)
treea1ae04d08272c835b924be59e975f29e0af0ce8a
parent6d217c3249d527bb15f4e6153f39ce7e82b01778 (diff)
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Fix 43484, swap registers if one is R0 for multiword moves
From-SVN: r157709
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/rs6000/rs6000.c10
2 files changed, 16 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e6d05fe..d2872bc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2010-03-24 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/43484
+ * config/rs6000/rs6000.c (rs6000_split_multireg_move): If r0 is
+ used in reg+reg addressing, swap registers.
+
2010-03-24 Jakub Jelinek <jakub@redhat.com>
PR debug/43293
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index ab48e82..98b4d94 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -16832,6 +16832,16 @@ rs6000_split_multireg_move (rtx dst, rtx src)
{
rtx basereg = XEXP (XEXP (dst, 0), 0);
rtx offsetreg = XEXP (XEXP (dst, 0), 1);
+ gcc_assert (GET_CODE (XEXP (dst, 0)) == PLUS
+ && REG_P (basereg)
+ && REG_P (offsetreg)
+ && REGNO (basereg) != REGNO (offsetreg));
+ if (REGNO (basereg) == 0)
+ {
+ rtx tmp = offsetreg;
+ offsetreg = basereg;
+ basereg = tmp;
+ }
emit_insn (gen_add3_insn (basereg, basereg, offsetreg));
restore_basereg = gen_sub3_insn (basereg, basereg, offsetreg);
dst = replace_equiv_address (dst, basereg);