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author | Eric Botcazou <ebotcazou@adacore.com> | 2017-01-11 11:27:43 +0000 |
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committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2017-01-11 11:27:43 +0000 |
commit | 849fccf8312f734dddf4e3ea84eeabd2e243a10d (patch) | |
tree | 293439ba584fbb7053bd43b36c0c1d62e28925c7 | |
parent | e325277522ec7a72286f1faa5bfb47f4b4be3d81 (diff) | |
download | gcc-849fccf8312f734dddf4e3ea84eeabd2e243a10d.zip gcc-849fccf8312f734dddf4e3ea84eeabd2e243a10d.tar.gz gcc-849fccf8312f734dddf4e3ea84eeabd2e243a10d.tar.bz2 |
re PR rtl-optimization/79032 (unaligned memory access generated with LRA and optimization)
PR rtl-optimization/79032
* lra-constraints.c (simplify_operand_subreg): In the MEM case, test
the alignment of the adjusted memory reference against that of MODE,
instead of the alignment of the original memory reference.
From-SVN: r244311
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/lra-constraints.c | 8 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.c-torture/execute/20170111-1.c | 33 |
4 files changed, 48 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3c8f977..00eabd0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2017-01-11 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/79032 + * lra-constraints.c (simplify_operand_subreg): In the MEM case, test + the alignment of the adjusted memory reference against that of MODE, + instead of the alignment of the original memory reference. + 2017-01-11 Martin Jambor <mjambor@suse.cz> * hsa.c (hsa_callable_function_p): Revert addition of DECL_ARTIFICIAL diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 5ada67a..7b0d2f4 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1505,15 +1505,15 @@ simplify_operand_subreg (int nop, machine_mode reg_mode) MEM_ADDR_SPACE (subst)))) { /* If we change the address for a paradoxical subreg of memory, the - address might violate the necessary alignment or the access might - be slow. So take this into consideration. We need not worry + new address might violate the necessary alignment or the access + might be slow; take this into consideration. We need not worry about accesses beyond allocated memory for paradoxical memory subregs as we don't substitute such equiv memory (see processing equivalences in function lra_constraints) and because for spilled pseudos we allocate stack memory enough for the biggest corresponding paradoxical subreg. */ - if (!(MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (mode) - && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg))) + if (!(MEM_ALIGN (subst) < GET_MODE_ALIGNMENT (mode) + && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (subst))) || (MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (innermode) && SLOW_UNALIGNED_ACCESS (innermode, MEM_ALIGN (reg)))) return true; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f189a44..c892d16 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-01-11 Eric Botcazou <ebotcazou@adacore.com> + + * gcc.c-torture/execute/20170111-1.c: New test. + 2017-01-11 Richard Biener <rguenther@suse.de> * gcc.dg/tree-ssa/pr61743-1.c: Adjust. diff --git a/gcc/testsuite/gcc.c-torture/execute/20170111-1.c b/gcc/testsuite/gcc.c-torture/execute/20170111-1.c new file mode 100644 index 0000000..0ff4bab --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/20170111-1.c @@ -0,0 +1,33 @@ +/* PR rtl-optimization/79032 */ +/* Reported by Daniel Cederman <cederman@gaisler.com> */ + +extern void abort (void); + +struct S { + short a; + long long b; + short c; + char d; + unsigned short e; + long *f; +}; + +static long foo (struct S *s) __attribute__((noclone, noinline)); + +static long foo (struct S *s) +{ + long a = 1; + a /= s->e; + s->f[a]--; + return a; +} + +int main (void) +{ + long val = 1; + struct S s = { 0, 0, 0, 0, 2, &val }; + val = foo (&s); + if (val != 0) + abort (); + return 0; +} |