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| author | J"orn Rennecke <joern.rennecke@superh.com> | 2003-04-16 17:41:10 +0000 |
|---|---|---|
| committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2003-04-16 18:41:10 +0100 |
| commit | 7f0ea82ec04647df66a50c6c90bbdd35426bab56 (patch) | |
| tree | 7a8e74a29d0fa7c9df1898d34e665463cf70b23e | |
| parent | c328adfa0e5f040d37332c9770bb7fcf50c1d1d5 (diff) | |
| download | gcc-7f0ea82ec04647df66a50c6c90bbdd35426bab56.zip gcc-7f0ea82ec04647df66a50c6c90bbdd35426bab56.tar.gz gcc-7f0ea82ec04647df66a50c6c90bbdd35426bab56.tar.bz2 | |
Re-apply this patch:
2002-05-16 Dale Johannesen <dalej@apple.com>
* combine.c (cant_combine_insn_p): Reenable combinations
involving hard regs unless CLASS_LIKELY_SPILLED_P.
From-SVN: r65689
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/combine.c | 14 |
2 files changed, 16 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6d31695..6fd841d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2003-04-16 J"orn Rennecke <joern.rennecke@superh.com> + + Re-apply this patch: + + 2002-05-16 Dale Johannesen <dalej@apple.com> + * combine.c (cant_combine_insn_p): Reenable combinations + involving hard regs unless CLASS_LIKELY_SPILLED_P. + 2003-04-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> PR/10271 diff --git a/gcc/combine.c b/gcc/combine.c index ed98db2..f7c9852 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1435,10 +1435,10 @@ cant_combine_insn_p (insn) if (! INSN_P (insn)) return 1; - /* Never combine loads and stores involving hard regs. The register - allocator can usually handle such reg-reg moves by tying. If we allow - the combiner to make substitutions of hard regs, we risk aborting in - reload on machines that have SMALL_REGISTER_CLASSES. + /* Never combine loads and stores involving hard regs that are likely + to be spilled. The register allocator can usually handle such + reg-reg moves by tying. If we allow the combiner to make + substitutions of likely-spilled regs, we may abort in reload. As an exception, we allow combinations involving fixed regs; these are not available to the register allocator so there's no risk involved. */ @@ -1453,9 +1453,11 @@ cant_combine_insn_p (insn) dest = SUBREG_REG (dest); if (REG_P (src) && REG_P (dest) && ((REGNO (src) < FIRST_PSEUDO_REGISTER - && ! fixed_regs[REGNO (src)]) + && ! fixed_regs[REGNO (src)] + && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (REGNO (src)))) || (REGNO (dest) < FIRST_PSEUDO_REGISTER - && ! fixed_regs[REGNO (dest)]))) + && ! fixed_regs[REGNO (dest)] + && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (REGNO (dest)))))) return 1; return 0; |