sparc.c (gen_compare_reg): Kill 2nd and 3rd argument, they are always sparc_compare_op0 and sparc_compare_op1.

	* config/sparc/sparc.c (gen_compare_reg): Kill 2nd and 3rd
	argument, they are always sparc_compare_op0 and sparc_compare_op1.
	(gen_v9_scc): Update callers.
	* config/sparc/sparc.md: Likewise.
	* config/sparc/sparc-protos.h: Update extern declaration.

From-SVN: r107696

4 files changed, 46 insertions, 48 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 031d15e..89674d9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2005-11-29  David S. Miller  <davem@sunset.davemloft.net>
+
+	* config/sparc/sparc.c (gen_compare_reg): Kill 2nd and 3rd
+	argument, they are always sparc_compare_op0 and sparc_compare_op1.
+	(gen_v9_scc): Update callers.
+	* config/sparc/sparc.md: Likewise.
+	* config/sparc/sparc-protos.h: Update extern declaration.
+
 2005-11-29  Andrew Pinski  <pinskia@physics.uc.edu>
 
 	* fold-const.c (negate_expr) <case BIT_NOT_EXPR>: Add break after
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index 7acf2b2..08d6171 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -55,7 +55,7 @@ extern void sparc_output_scratch_registers (FILE *);
 #ifdef RTX_CODE
 extern enum machine_mode select_cc_mode (enum rtx_code, rtx, rtx);
 /* Define the function that build the compare insn for scc and bcc.  */
-extern rtx gen_compare_reg (enum rtx_code code, rtx, rtx);
+extern rtx gen_compare_reg (enum rtx_code code);
 extern void sparc_emit_float_lib_cmp (rtx, rtx, enum rtx_code);
 extern void sparc_emit_floatunsdi (rtx [2], enum machine_mode);
 extern void sparc_emit_fixunsdi (rtx [2], enum machine_mode);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index e0ca397..7047af3 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1900,8 +1900,10 @@ select_cc_mode (enum rtx_code op, rtx x, rtx y ATTRIBUTE_UNUSED)
    return the rtx for the cc reg in the proper mode.  */
 
 rtx
-gen_compare_reg (enum rtx_code code, rtx x, rtx y)
+gen_compare_reg (enum rtx_code code)
 {
+  rtx x = sparc_compare_op0;
+  rtx y = sparc_compare_op1;
   enum machine_mode mode = SELECT_CC_MODE (code, x, y);
   rtx cc_reg;
 
@@ -1990,22 +1992,20 @@ gen_compare_reg (enum rtx_code code, rtx x, rtx y)
 int
 gen_v9_scc (enum rtx_code compare_code, register rtx *operands)
 {
-  rtx temp, op0, op1;
-
   if (! TARGET_ARCH64
       && (GET_MODE (sparc_compare_op0) == DImode
 	  || GET_MODE (operands[0]) == DImode))
     return 0;
 
-  op0 = sparc_compare_op0;
-  op1 = sparc_compare_op1;
-
   /* Try to use the movrCC insns.  */
   if (TARGET_ARCH64
-      && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
-      && op1 == const0_rtx
+      && GET_MODE_CLASS (GET_MODE (sparc_compare_op0)) == MODE_INT
+      && sparc_compare_op1 == const0_rtx
       && v9_regcmp_p (compare_code))
     {
+      rtx op0 = sparc_compare_op0;
+      rtx temp;
+
       /* Special case for op0 != 0.  This can be done with one instruction if
 	 operands[0] == sparc_compare_op0.  */
 
@@ -2048,7 +2048,7 @@ gen_v9_scc (enum rtx_code compare_code, register rtx *operands)
     }
   else
     {
-      operands[1] = gen_compare_reg (compare_code, op0, op1);
+      operands[1] = gen_compare_reg (compare_code);
 
       switch (GET_MODE (operands[1]))
 	{
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index db03488..2047cfa 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -803,7 +803,7 @@
       if (gen_v9_scc (LTU, operands))
 	DONE;
     }
-  operands[1] = gen_compare_reg (LTU, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (LTU);
 })
 
 (define_expand "sgeu"
@@ -816,7 +816,7 @@
       if (gen_v9_scc (GEU, operands))
 	DONE;
     }
-  operands[1] = gen_compare_reg (GEU, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (GEU);
 })
 
 (define_expand "sleu"
@@ -1267,7 +1267,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (EQ, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (EQ);
 })
 
 (define_expand "bne"
@@ -1290,7 +1290,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (NE, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (NE);
 })
 
 (define_expand "bgt"
@@ -1313,7 +1313,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (GT, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (GT);
 })
 
 (define_expand "bgtu"
@@ -1323,7 +1323,7 @@
 		      (pc)))]
   ""
 {
-  operands[1] = gen_compare_reg (GTU, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (GTU);
 })
 
 (define_expand "blt"
@@ -1346,7 +1346,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (LT, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (LT);
 })
 
 (define_expand "bltu"
@@ -1356,7 +1356,7 @@
 		      (pc)))]
   ""
 {
-  operands[1] = gen_compare_reg (LTU, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (LTU);
 })
 
 (define_expand "bge"
@@ -1379,7 +1379,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (GE, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (GE);
 })
 
 (define_expand "bgeu"
@@ -1389,7 +1389,7 @@
 		      (pc)))]
   ""
 {
-  operands[1] = gen_compare_reg (GEU, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (GEU);
 })
 
 (define_expand "ble"
@@ -1412,7 +1412,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (LE, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (LE);
 })
 
 (define_expand "bleu"
@@ -1422,7 +1422,7 @@
 		      (pc)))]
   ""
 {
-  operands[1] = gen_compare_reg (LEU, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (LEU);
 })
 
 (define_expand "bunordered"
@@ -1439,8 +1439,7 @@
       emit_jump_insn (gen_beq (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (UNORDERED, sparc_compare_op0,
-				 sparc_compare_op1);
+  operands[1] = gen_compare_reg (UNORDERED);
 })
 
 (define_expand "bordered"
@@ -1456,8 +1455,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (ORDERED, sparc_compare_op0,
-				 sparc_compare_op1);
+  operands[1] = gen_compare_reg (ORDERED);
 })
 
 (define_expand "bungt"
@@ -1473,7 +1471,7 @@
       emit_jump_insn (gen_bgt (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (UNGT, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (UNGT);
 })
 
 (define_expand "bunlt"
@@ -1489,7 +1487,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (UNLT, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (UNLT);
 })
 
 (define_expand "buneq"
@@ -1505,7 +1503,7 @@
       emit_jump_insn (gen_beq (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (UNEQ, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (UNEQ);
 })
 
 (define_expand "bunge"
@@ -1521,7 +1519,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (UNGE, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (UNGE);
 })
 
 (define_expand "bunle"
@@ -1537,7 +1535,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (UNLE, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (UNLE);
 })
 
 (define_expand "bltgt"
@@ -1553,7 +1551,7 @@
       emit_jump_insn (gen_bne (operands[0]));
       DONE;
     }
-  operands[1] = gen_compare_reg (LTGT, sparc_compare_op0, sparc_compare_op1);
+  operands[1] = gen_compare_reg (LTGT);
 })
 
 ;; Now match both normal and inverted jump.
@@ -3025,8 +3023,7 @@
     }
   else
     {
-      rtx cc_reg = gen_compare_reg (code,
-				    sparc_compare_op0, sparc_compare_op1);
+      rtx cc_reg = gen_compare_reg (code);
       operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
     }
 })
@@ -3054,8 +3051,7 @@
     }
   else
     {
-      rtx cc_reg = gen_compare_reg (code,
-				    sparc_compare_op0, sparc_compare_op1);
+      rtx cc_reg = gen_compare_reg (code);
       operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
     }
 })
@@ -3079,8 +3075,7 @@
     }
   else
     {
-      rtx cc_reg = gen_compare_reg (code,
-				    sparc_compare_op0, sparc_compare_op1);
+      rtx cc_reg = gen_compare_reg (code);
       operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg),
 				    cc_reg, const0_rtx);
     }
@@ -3105,8 +3100,7 @@
     }
   else
     {
-      rtx cc_reg = gen_compare_reg (code,
-				    sparc_compare_op0, sparc_compare_op1);
+      rtx cc_reg = gen_compare_reg (code);
       operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg),
 				    cc_reg, const0_rtx);
     }
@@ -3135,8 +3129,7 @@
     }
   else
     {
-      rtx cc_reg = gen_compare_reg (code,
-				    sparc_compare_op0, sparc_compare_op1);
+      rtx cc_reg = gen_compare_reg (code);
       operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
     }
 })
@@ -3164,8 +3157,7 @@
     }
   else
     {
-      rtx cc_reg = gen_compare_reg (code,
-				    sparc_compare_op0, sparc_compare_op1);
+      rtx cc_reg = gen_compare_reg (code);
       operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
     }
 })
@@ -3193,8 +3185,7 @@
     }
   else
     {
-      rtx cc_reg = gen_compare_reg (code,
-				    sparc_compare_op0, sparc_compare_op1);
+      rtx cc_reg = gen_compare_reg (code);
       operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx);
     }
 })
@@ -7567,8 +7558,7 @@
   [(trap_if (match_operator 0 "noov_compare_operator" [(match_dup 2) (match_dup 3)])
 	    (match_operand:SI 1 "arith_operand" ""))]
   ""
-  "operands[2] = gen_compare_reg (GET_CODE (operands[0]),
-				  sparc_compare_op0, sparc_compare_op1);
+  "operands[2] = gen_compare_reg (GET_CODE (operands[0]));
    if (GET_MODE (operands[2]) != CCmode && GET_MODE (operands[2]) != CCXmode)
      FAIL;
    operands[3] = const0_rtx;")