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| author | H.J. Lu <hongjiu.lu@intel.com> | 2013-11-22 12:57:14 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2013-11-22 04:57:14 -0800 |
| commit | 7dced2146bd2e020e6b0347cbb1c3c28b1a60376 (patch) | |
| tree | b8d33a29e0089350b6538365d0174e44c781af0d | |
| parent | 954d4574058aacd03f1cc7ff27ed52ed8fbae32f (diff) | |
| download | gcc-7dced2146bd2e020e6b0347cbb1c3c28b1a60376.zip gcc-7dced2146bd2e020e6b0347cbb1c3c28b1a60376.tar.gz gcc-7dced2146bd2e020e6b0347cbb1c3c28b1a60376.tar.bz2 | |
Enable PTA_POPCNT for Silvermont
* config/i386/i386.c (processor_alias_table): Enable PTA_POPCNT
for Silvermont.
* doc/invoke.texi: Mention POPCNT for corei7, corei7-avx,
core-avx-i, core-avx2 and slm.
From-SVN: r205255
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 4 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 16 |
3 files changed, 18 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ed35202..9afe264 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2013-11-22 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (processor_alias_table): Enable PTA_POPCNT + for Silvermont. + + * doc/invoke.texi: Mention POPCNT for corei7, corei7-avx, + core-avx-i, core-avx2 and slm. + 2013-11-22 Eric Botcazou <ebotcazou@adacore.com> * print-rtl.c (print_rtx) <case MEM>: Output a space if no MEM_EXPR. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c818cb9..459281e 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3136,8 +3136,8 @@ ix86_option_override_internal (bool main_args_p, PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE | PTA_FXSR}, {"slm", PROCESSOR_SLM, CPU_SLM, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_MOVBE + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 + | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_MOVBE | PTA_FXSR}, {"geode", PROCESSOR_GEODE, CPU_GEODE, PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_PREFETCH_SSE | PTA_PRFCHW}, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 0a26212..6adfc98 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -14512,22 +14512,22 @@ Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support. @item corei7 -Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 -and SSE4.2 instruction set support. +Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2 and POPCNT instruction set support. @item corei7-avx Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support. +SSE4.1, SSE4.2, POPCNT, AVX, AES and PCLMUL instruction set support. @item core-avx-i Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction -set support. +SSE4.1, SSE4.2, POPCNT, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C +instruction set support. @item core-avx2 Intel Core CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2 -and F16C instruction set support. +SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, +BMI, BMI2 and F16C instruction set support. @item atom Intel Atom CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3 @@ -14535,7 +14535,7 @@ instruction set support. @item slm Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1 and SSE4.2 instruction set support. +SSE4.1, SSE4.2 and POPCNT instruction set support. @item k6 AMD K6 CPU with MMX instruction set support. |