sparc.c (fp_zero_operand): Turn into a normal predicate.

        * sparc.c (fp_zero_operand): Turn into a normal predicate.
        Use CONST0_RTX.  Update all callers.
        * sparc.h, sparc-protos.h: Update accordingly.
        * sparc.md (fp mov insns): Use fp_zero_operand directly
        where applicable.

From-SVN: r31748

5 files changed, 36 insertions, 47 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5b94d0f..31d33d3 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2000-02-01  Richard Henderson  <rth@cygnus.com>
+
+	* sparc.c (fp_zero_operand): Turn into a normal predicate.
+	Use CONST0_RTX.  Update all callers.
+	* sparc.h, sparc-protos.h: Update accordingly.
+	* sparc.md (fp mov insns): Use fp_zero_operand directly
+	where applicable.
+
 Wed Feb  2 02:59:45 2000  Hans-Peter Nilsson  <hp@bitrange.com>
 
 	* tm.texi (Values in Registers): Fix typo in HARD_REGNO_NREGS
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index c9c79a0..9fa6d45 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -124,7 +124,7 @@ extern int eligible_for_return_delay PARAMS ((rtx));
 extern int emit_move_sequence PARAMS ((rtx, enum machine_mode));
 extern int extend_op PARAMS ((rtx, enum machine_mode));
 extern int fcc_reg_operand PARAMS ((rtx, enum machine_mode));
-extern int fp_zero_operand PARAMS ((rtx));
+extern int fp_zero_operand PARAMS ((rtx, enum machine_mode));
 extern int fp_sethi_p PARAMS ((rtx));
 extern int fp_mov_p PARAMS ((rtx));
 extern int fp_high_losum_p PARAMS ((rtx));
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index d6b80b2..891da83 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -387,9 +387,7 @@ reg_or_0_operand (op, mode)
       && CONST_DOUBLE_HIGH (op) == 0
       && CONST_DOUBLE_LOW (op) == 0)
     return 1;
-  if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
-      && GET_CODE (op) == CONST_DOUBLE
-      && fp_zero_operand (op))
+  if (fp_zero_operand (op, mode))
     return 1;
   return 0;
 }
@@ -397,13 +395,13 @@ reg_or_0_operand (op, mode)
 /* Nonzero if OP is a floating point value with value 0.0.  */
 
 int
-fp_zero_operand (op)
+fp_zero_operand (op, mode)
      rtx op;
+     enum machine_mode mode;
 {
-  REAL_VALUE_TYPE r;
-
-  REAL_VALUE_FROM_CONST_DOUBLE (r, op);
-  return (REAL_VALUES_EQUAL (r, dconst0) && ! REAL_VALUE_MINUS_ZERO (r));
+  if (GET_MODE_CLASS (GET_MODE (op)) != MODE_FLOAT)
+    return 0;
+  return op == CONST0_RTX (mode);
 }
 
 /* Nonzero if OP is a floating point constant which can
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 03317bd..e69217d 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1467,8 +1467,8 @@ extern char leaf_reg_remap[];
    Here VALUE is the CONST_DOUBLE rtx itself.  */
 
 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)	\
-  ((C) == 'G' ? fp_zero_operand (VALUE)			\
-   : (C) == 'H' ? arith_double_operand (VALUE, DImode)	\
+  ((C) == 'G' ? fp_zero_operand (VALUE, GET_MODE (VALUE))	\
+   : (C) == 'H' ? arith_double_operand (VALUE, DImode)		\
    : 0)
 
 /* Given an rtx X being reloaded into a reg required to be
@@ -2266,7 +2266,7 @@ LFLGRET"ID":\n\
    (TARGET_VIS &&							\
     (GET_MODE (X) == SFmode || GET_MODE (X) == DFmode ||		\
      GET_MODE (X) == TFmode) &&						\
-    fp_zero_operand (X)))
+    fp_zero_operand (X, GET_MODE (X))))
 
 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
    and check its validity for a certain class.
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 40fe3a8..e84294e 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -3023,7 +3023,7 @@
   "(TARGET_FPU && ! TARGET_VIS && ! TARGET_LIVE_G0)
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode)
-       || fp_zero_operand (operands[1]))"
+       || fp_zero_operand (operands[1], SFmode))"
   "*
 {
   if (GET_CODE (operands[1]) == CONST_DOUBLE
@@ -3068,7 +3068,7 @@
   "(TARGET_FPU && TARGET_VIS)
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode)
-       || fp_zero_operand (operands[1]))"
+       || fp_zero_operand (operands[1], SFmode))"
   "*
 {
   if (GET_CODE (operands[1]) == CONST_DOUBLE
@@ -3181,9 +3181,7 @@
   if (GET_CODE (operands[0]) == REG
       && CONSTANT_P (operands[1]))
     {
-      if (TARGET_VIS
-          && GET_CODE (operands[1]) == CONST_DOUBLE
-	  && fp_zero_operand (operands[1]))
+      if (TARGET_VIS && fp_zero_operand (operands[1], SFmode))
 	goto movsf_is_ok;
 
       /* emit_group_store will send such bogosity to us when it is
@@ -3199,9 +3197,7 @@
   if (GET_CODE (operands[0]) == MEM)
     {
       if (register_operand (operands[1], SFmode)
-	  || (! TARGET_LIVE_G0
-	      && GET_CODE (operands[1]) == CONST_DOUBLE
-              && fp_zero_operand (operands[1])))
+	  || (! TARGET_LIVE_G0 && fp_zero_operand (operands[1], SFmode)))
 	goto movsf_is_ok;
 
       if (! reload_in_progress)
@@ -3234,19 +3230,16 @@
 
 (define_insn "*clear_df"
   [(set (match_operand:DF 0 "register_operand" "=e")
-        (match_operand:DF 1 "const_double_operand" ""))]
-  "TARGET_VIS
-   && fp_zero_operand (operands[1])"
+        (match_operand:DF 1 "fp_zero_operand" ""))]
+  "TARGET_VIS"
   "fzero\\t%0"
   [(set_attr "type" "fpmove")
    (set_attr "length" "1")])
 
 (define_insn "*clear_dfp"
   [(set (match_operand:DF 0 "memory_operand" "=m")
-        (match_operand:DF 1 "const_double_operand" ""))]
-  "! TARGET_LIVE_G0
-   && TARGET_V9
-   && fp_zero_operand (operands[1])"
+        (match_operand:DF 1 "fp_zero_operand" ""))]
+  "! TARGET_LIVE_G0 && TARGET_V9"
   "stx\\t%%g0, %0"
   [(set_attr "type" "store")
    (set_attr "length" "1")])
@@ -3340,9 +3333,7 @@
   if (GET_CODE (operands[0]) == REG
       && CONSTANT_P (operands[1]))
     {
-      if (TARGET_VIS
-          && GET_CODE (operands[1]) == CONST_DOUBLE
-	  && fp_zero_operand (operands[1]))
+      if (TARGET_VIS && fp_zero_operand (operands[1], DFmode))
 	goto movdf_is_ok;
 
       /* emit_group_store will send such bogosity to us when it is
@@ -3604,18 +3595,16 @@
 
 (define_insn "*clear_tf"
   [(set (match_operand:TF 0 "register_operand" "=e")
-        (match_operand:TF 1 "const_double_operand" ""))]
-  "TARGET_VIS
-   && fp_zero_operand (operands[1])"
+        (match_operand:TF 1 "fp_zero_operand" ""))]
+  "TARGET_VIS"
   "#"
   [(set_attr "type" "fpmove")
    (set_attr "length" "2")])
 
 (define_split
   [(set (match_operand:TF 0 "register_operand" "")
-        (match_operand:TF 1 "const_double_operand" ""))]
-  "TARGET_VIS && reload_completed
-   && fp_zero_operand (operands[1])"
+        (match_operand:TF 1 "fp_zero_operand" ""))]
+  "TARGET_VIS && reload_completed"
   [(set (subreg:DF (match_dup 0) 0) (match_dup 1))
    (set (subreg:DF (match_dup 0) 8) (match_dup 1))]
   "
@@ -3626,20 +3615,16 @@
 
 (define_insn "*clear_tfp"
   [(set (match_operand:TF 0 "memory_operand" "=m")
-        (match_operand:TF 1 "const_double_operand" ""))]
-  "! TARGET_LIVE_G0
-   && TARGET_V9
-   && fp_zero_operand (operands[1])"
+        (match_operand:TF 1 "fp_zero_operand" ""))]
+  "! TARGET_LIVE_G0 && TARGET_V9"
   "#"
   [(set_attr "type" "fpmove")
    (set_attr "length" "2")])
 
 (define_split
   [(set (match_operand:TF 0 "memory_operand" "=m")
-        (match_operand:TF 1 "const_double_operand" ""))]
-  "! TARGET_LIVE_G0
-   && TARGET_V9 && reload_completed
-   && fp_zero_operand (operands[1])"
+        (match_operand:TF 1 "fp_zero_operand" ""))]
+  "! TARGET_LIVE_G0 && TARGET_V9 && reload_completed"
   [(set (subreg:DF (match_dup 0) 0) (match_dup 1))
    (set (subreg:DF (match_dup 0) 8) (match_dup 1))]
   "
@@ -3658,9 +3643,7 @@
   if (GET_CODE (operands[0]) == REG
       && CONSTANT_P (operands[1]))
     {
-      if (TARGET_VIS
-          && GET_CODE (operands[1]) == CONST_DOUBLE
-	  && fp_zero_operand (operands[1]))
+      if (TARGET_VIS && fp_zero_operand (operands[1], TFmode))
 	goto movtf_is_ok;
 
       /* emit_group_store will send such bogosity to us when it is