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authorRoger Sayle <roger@nextmovesoftware.com>2020-08-04 16:56:06 +0100
committerRoger Sayle <roger@nextmovesoftware.com>2020-08-04 16:57:34 +0100
commit76eafcc395d2bcd4147cb1ba1a8aff321571402f (patch)
treeb3229a1f228034bb4fc5ddfeba8513129d87f9ac
parentca2b8c082c4f16919071c9f8de8db0b33b54c405 (diff)
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Test case for PR rtl-optimization/60473
PR rtl-optimization/60473 is code quality regression that has been cured by improvements to register allocation. For the function in the test case, GCC 4.4, 4.5 and 4.6 generated very poor code requiring two mov instructions, and GCC 4.7 and 4.8 (when the PR was filed) produced better but still poor code with one mov instruction. Since GCC 4.9 (including current mainline), it generates optimal code with no mov instructions, matching what used to be generated in GCC 4.1. 2020-08-04 Roger Sayle <roger@nextmovesoftware.com> gcc/testsuite/ChangeLog PR rtl-optimization/60473 * gcc.target/i386/pr60473.c: New test.
-rw-r--r--gcc/testsuite/gcc.target/i386/pr60473.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/pr60473.c b/gcc/testsuite/gcc.target/i386/pr60473.c
new file mode 100644
index 0000000..d81962e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr60473.c
@@ -0,0 +1,12 @@
+/* PR rtl-optimization/60473 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2" } */
+
+unsigned long long foo()
+{
+ unsigned long long h,l;
+ asm volatile ("rdtsc": "=a" (l), "=d" (h));
+ return l | (h << 32);
+}
+
+/* { dg-final { scan-assembler-not "mov" } } */