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authorRichard Earnshaw <rearnsha@arm.com>2009-06-27 11:15:04 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2009-06-27 11:15:04 +0000
commit75d2803096713cc0f9c1354a706f0e5802975908 (patch)
tree591f1a957a9555d9a223eeda1e6429deff1ab0a0
parent91dc2352260236b6cd3b806781b18b73e0ac207a (diff)
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arm.md (casesi): Fix test for Thumb1.
* arm.md (casesi): Fix test for Thumb1. (thumb1_casesi_internal_pic): Likewise. (thumb1_casesi_dispatch): Likewise. From-SVN: r149005
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/arm.md6
2 files changed, 9 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c8bb8d2..66a48c1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2009-06-27 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm.md (casesi): Fix test for Thumb1.
+ (thumb1_casesi_internal_pic): Likewise.
+ (thumb1_casesi_dispatch): Likewise.
+
2009-06-26 Daniel Gutson <dgutson@codesourcery.com>
* config/arm/arm-cores.def: Added core cortex-m0.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 4f8b5fa..d3609ac 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8908,7 +8908,7 @@
if (TARGET_ARM)
code = CODE_FOR_arm_casesi_internal;
- else if (TARGET_THUMB)
+ else if (TARGET_THUMB1)
code = CODE_FOR_thumb1_casesi_internal_pic;
else if (flag_pic)
code = CODE_FOR_thumb2_casesi_internal_pic;
@@ -8951,7 +8951,7 @@
(match_operand:SI 1 "thumb1_cmp_operand" "")
(match_operand 2 "" "")
(match_operand 3 "" "")]
- "TARGET_THUMB"
+ "TARGET_THUMB1"
{
rtx reg0;
rtx test = gen_rtx_GTU (VOIDmode, operands[0], operands[1]);
@@ -8972,7 +8972,7 @@
UNSPEC_THUMB1_CASESI))
(clobber (reg:SI IP_REGNUM))
(clobber (reg:SI LR_REGNUM))])]
- "TARGET_THUMB"
+ "TARGET_THUMB1"
"* return thumb1_output_casesi(operands);"
[(set_attr "length" "4")]
)