[1/4] ARMv8.2-A FP16 testsuite selector

gcc/testsuite/

	* target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar): Mention
	AArch64 support.
	(add_options_for_arm_v8_2a_fp16_neon): Likewise.
	(check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Support
	AArch64 targets.
	(check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Support
	AArch64 targets.
	(check_effective_target_arm_v8_2a_fp16_scalar_hw): Support AArch64
	targets.
	(check_effective_target_arm_v8_2a_fp16_neon_hw): Likewise.

From-SVN: r240921

2 files changed, 53 insertions, 13 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index da29590..c56f494a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,8 +1,22 @@
+2016-10-10  Matthew Wahab  <matthew.wahab@arm.com>
+	    Jiong Wang  <jiong.wang@arm.com>
+
+	* target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar): Mention
+	AArch64 support.
+	(add_options_for_arm_v8_2a_fp16_neon): Likewise.
+	(check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Support
+	AArch64 targets.
+	(check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Support
+	AArch64 targets.
+	(check_effective_target_arm_v8_2a_fp16_scalar_hw): Support AArch64
+	targets.
+	(check_effective_target_arm_v8_2a_fp16_neon_hw): Likewise.
+
 2016-10-10  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gnat.dg/specs/vfa.ads: New test.
 
-2016-10-10  Eric Botcazou  <ebotcazou@adacore.com>
+2016-10-10  Eric Botgazou  <ebotcazou@adacore.com>
 
 	* gnat.dg/inline13.ad[sb]: New test.
 	* gnat.dg/inline13_pkg.ad[sb]: New helper.
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 50723de..7eb543d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3216,7 +3216,7 @@ proc add_options_for_arm_v8_1a_neon { flags } {
 }
 
 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
-# Also adds the ARMv8 FP options for ARM.
+# Also adds the ARMv8 FP options for ARM and for AArch64.
 
 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
     if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
@@ -3227,7 +3227,7 @@ proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
 }
 
 # Add the options needed for ARMv8.2 with the FP16 extension.  Also adds
-# the ARMv8 NEON options for ARM.
+# the ARMv8 NEON options for ARM and for AArch64.
 
 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
     if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
@@ -3884,14 +3884,14 @@ proc check_effective_target_arm_v8_1a_neon_ok { } {
 }
 
 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
-# instructions, 0 otherwise.  The test is valid for ARM.  Record the
-# command line options needed.
+# instructions, 0 otherwise.  The test is valid for ARM and for AArch64.
+# Record the command line options needed.
 
 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
     global et_arm_v8_2a_fp16_scalar_flags
     set et_arm_v8_2a_fp16_scalar_flags ""
 
-    if { ![istarget arm*-*-*] } {
+    if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
 	return 0;
     }
 
@@ -3919,14 +3919,14 @@ proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
 }
 
 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
-# instructions, 0 otherwise.  The test is valid for ARM.  Record the
-# command line options needed.
+# instructions, 0 otherwise.  The test is valid for ARM and for AArch64.
+# Record the command line options needed.
 
 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
     global et_arm_v8_2a_fp16_neon_flags
     set et_arm_v8_2a_fp16_neon_flags ""
 
-    if { ![istarget arm*-*-*] } {
+    if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
 	return 0;
     }
 
@@ -4016,7 +4016,8 @@ proc check_effective_target_arm_v8_1a_neon_hw { } {
 }
 
 # Return 1 if the target supports executing floating point instructions from
-# ARMv8.2 with the FP16 extension, 0 otherwise.  The test is valid for ARM.
+# ARMv8.2 with the FP16 extension, 0 otherwise.  The test is valid for ARM and
+# for AArch64.
 
 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
     if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
@@ -4029,19 +4030,30 @@ proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
 	  __fp16 a = 1.0;
 	  __fp16 result;
 
+	  #ifdef __ARM_ARCH_ISA_A64
+
+	  asm ("fabs %h0, %h1"
+	       : "=w"(result)
+	       : "w"(a)
+	       : /* No clobbers.  */);
+
+	  #else
+
 	  asm ("vabs.f16 %0, %1"
 	       : "=w"(result)
 	       : "w"(a)
 	       : /* No clobbers.  */);
 
+	  #endif
+
 	  return (result == 1.0) ? 0 : 1;
 	}
     } [add_options_for_arm_v8_2a_fp16_scalar ""]]
 }
 
-# Return 1 if the target supports executing instructions Adv.SIMD
-# instructions from ARMv8.2 with the FP16 extension, 0 otherwise.  The
-# test is valid for ARM.
+# Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
+# with the FP16 extension, 0 otherwise.  The test is valid for ARM and for
+# AArch64.
 
 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
     if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
@@ -4051,6 +4063,18 @@ proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
 	int
 	main (void)
 	{
+	  #ifdef __ARM_ARCH_ISA_A64
+
+	  __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
+	  __Float16x4_t result;
+
+	  asm ("fabs %0.4h, %1.4h"
+	       : "=w"(result)
+	       : "w"(a)
+	       : /* No clobbers.  */);
+
+	  #else
+
 	  __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
 	  __simd64_float16_t result;
 
@@ -4059,6 +4083,8 @@ proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
 	       : "w"(a)
 	       : /* No clobbers.  */);
 
+	  #endif
+
 	  return (result[0] == 1.0) ? 0 : 1;
 	}
     } [add_options_for_arm_v8_2a_fp16_neon ""]]