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authorChung-Ju Wu <jasonwucj@gmail.com>2024-01-09 14:26:18 +0800
committerChung-Ju Wu <jasonwucj@gmail.com>2024-01-09 14:26:18 +0800
commit6e249a9ad9d26fb01b147d33be9f9bfebca85c24 (patch)
treeb54d594d252e1cc1c11af4ebdf6788d60465f51b
parentab6224dfe12bd57f02343375a03c8a979e927d93 (diff)
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arm: Add support for Arm Cortex-M52 CPU.
This patch adds the -mcpu support for the Arm Cortex-M52 CPU which is an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default. -mcpu=cortex-m52 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp. The cde feature is supported by specifying +cdecpN (e.g. -mcpu=cortex-m52+cdecp<N>), where N is the coprocessor number 0 to 7. Also following options are provided to disable default features. +nomve.fp (disables MVE Floating point) +nomve (disables MVE Integer and MVE Floating point) +nodsp (disables dsp, MVE Integer and MVE Floating point) +nopacbti (disables pacbti) +nofp (disables floating point and MVE floating point) Signed-off-by: Chung-Ju Wu <jasonwucj@gmail.com> gcc/ChangeLog: * config/arm/arm-cpus.in (cortex-m52): New cpu. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Regenerate.
-rw-r--r--gcc/config/arm/arm-cpus.in21
-rw-r--r--gcc/config/arm/arm-tables.opt3
-rw-r--r--gcc/config/arm/arm-tune.md6
3 files changed, 27 insertions, 3 deletions
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 6fa7e31..451b15f 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -1641,6 +1641,27 @@ begin cpu cortex-m35p
costs v7m
end cpu cortex-m35p
+begin cpu cortex-m52
+ cname cortexm52
+ tune flags LDSCHED
+ architecture armv8.1-m.main+pacbti+mve.fp+fp.dp
+ option nopacbti remove pacbti
+ option nomve.fp remove mve_float
+ option nomve remove mve mve_float
+ option nofp remove ALL_FP mve_float
+ option nodsp remove MVE mve_float
+ option cdecp0 add cdecp0
+ option cdecp1 add cdecp1
+ option cdecp2 add cdecp2
+ option cdecp3 add cdecp3
+ option cdecp4 add cdecp4
+ option cdecp5 add cdecp5
+ option cdecp6 add cdecp6
+ option cdecp7 add cdecp7
+ isa quirk_no_asmcpu quirk_vlldm
+ costs v7m
+end cpu cortex-m52
+
begin cpu cortex-m55
cname cortexm55
tune flags LDSCHED
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 9d6ae87..d3eb9a9 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -283,6 +283,9 @@ EnumValue
Enum(processor_type) String(cortex-m35p) Value( TARGET_CPU_cortexm35p)
EnumValue
+Enum(processor_type) String(cortex-m52) Value( TARGET_CPU_cortexm52)
+
+EnumValue
Enum(processor_type) String(cortex-m55) Value( TARGET_CPU_cortexm55)
EnumValue
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index 7318f03..6a631d8 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -49,7 +49,7 @@
cortexa710,cortexx1,cortexx1c,
neoversen1,cortexa75cortexa55,cortexa76cortexa55,
neoversev1,neoversen2,cortexm23,
- cortexm33,cortexm35p,cortexm55,
- starmc1,cortexm85,cortexr52,
- cortexr52plus"
+ cortexm33,cortexm35p,cortexm52,
+ cortexm55,starmc1,cortexm85,
+ cortexr52,cortexr52plus"
(const (symbol_ref "((enum attr_tune) arm_tune)")))