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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2017-09-26 18:12:33 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2017-09-26 18:12:33 +0000 |
| commit | 6c1f23fff1c23c17d9a6599e0855743474ff9f57 (patch) | |
| tree | 130f78f492150af7bcc7381c7655f140f0f71b68 | |
| parent | d33a4d86f19ea7017216d2363fe045d044d8fdf1 (diff) | |
| download | gcc-6c1f23fff1c23c17d9a6599e0855743474ff9f57.zip gcc-6c1f23fff1c23c17d9a6599e0855743474ff9f57.tar.gz gcc-6c1f23fff1c23c17d9a6599e0855743474ff9f57.tar.bz2 | |
rs6000.md (movsi_from_df): Optimize converting a DFmode to a SFmode...
2017-09-26 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (movsi_from_df): Optimize converting a
DFmode to a SFmode, and then needing to move the SFmode to a GPR
to use the XSCVDPSP instruction instead of FRSP and XSCVDPSPN.
From-SVN: r253210
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 20 |
2 files changed, 23 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9b5b9fc..7c8ff6c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -11,7 +11,9 @@ (movdi_from_sf_zero_ext): Likewise. (reload_gpr_from_vsxsf): Likewise. (p8_mfvsrd_4_disf): Delete, no longer used. - + (movsi_from_df): Optimize converting a DFmode to a SFmode, and + then needing to move the SFmode to a GPR to use the XSCVDPSP + instruction instead of FRSP and XSCVDPSPN. 2017-09-26 Martin Jambor <mjambor@suse.cz> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c91719f..9b10e7f 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -6919,6 +6919,26 @@ "4, 4, 4, 4, 8, 8, 4")]) +;; Like movsi_from_sf, but combine a convert from DFmode to SFmode before +;; moving it to SImode. We can do a SFmode store without having to do the +;; conversion explicitly. If we are doing a register->register conversion, use +;; XSCVDPSP instead of XSCVDPSPN, since the former handles cases where the +;; input will not fit in a SFmode, and the later assumes the value has already +;; been rounded. +(define_insn "*movsi_from_df" + [(set (match_operand:SI 0 "nonimmediate_operand" "=wa,m,wY,Z") + (unspec:SI [(float_truncate:SF + (match_operand:DF 1 "gpc_reg_operand" "wa, f,wb,wa"))] + UNSPEC_SI_FROM_SF))] + + "TARGET_NO_SF_SUBREG" + "@ + xscvdpsp %x0,%x1 + stfs%U0%X0 %1,%0 + stxssp %1,%0 + stxsspx %x1,%y0" + [(set_attr "type" "fp,fpstore,fpstore,fpstore")]) + ;; Split a load of a large constant into the appropriate two-insn ;; sequence. |