a29k.c: Fix comment formatting.

	* config/a29k/a29k.c: Fix comment formatting.
	* config/a29k/a29k.h: Likewise.
	* config/arc/arc.c: Likewise.
	* config/arc/arc.h: Likewise.
	* config/vax/vax.c: Likewise.
	* config/vax/vax.h: Likewise.
	* config/we32k/we32k.c: Likewise.
	* config/we32k/we32k.h: Likewise.

From-SVN: r47091

9 files changed, 66 insertions, 55 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9eb2c0a..50f3e05 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2001-11-16  Kazu Hirata  <kazu@hxi.com>
+
+	* config/a29k/a29k.c: Fix comment formatting.
+	* config/a29k/a29k.h: Likewise.
+	* config/arc/arc.c: Likewise.
+	* config/arc/arc.h: Likewise.
+	* config/vax/vax.c: Likewise.
+	* config/vax/vax.h: Likewise.
+	* config/we32k/we32k.c: Likewise.
+	* config/we32k/we32k.h: Likewise.
+
 2001-11-16  Jeff Law  <law@redhat.com>
 
 	* unroll.c (copy_loop_body): Initialize JUMP_LABEL field after
diff --git a/gcc/config/a29k/a29k.c b/gcc/config/a29k/a29k.c
index 730ff55..5312471 100644
--- a/gcc/config/a29k/a29k.c
+++ b/gcc/config/a29k/a29k.c
@@ -106,7 +106,7 @@ int a29k_compare_fp_p;
 
 struct gcc_target targetm = TARGET_INITIALIZER;
 
-/* Returns 1 if OP is a 8-bit constant. */
+/* Returns 1 if OP is a 8-bit constant.  */
 
 int
 cint_8_operand (op, mode)
@@ -351,7 +351,7 @@ and_operand (op, mode)
 
 /* Return 1 if OP can be used as the second operand of an ADD insn.
    This is the same as above, except we use negative, rather than
-   complement.   */
+   complement.  */
 
 int
 add_operand (op, mode)
@@ -1225,7 +1225,7 @@ print_operand (file, x, code)
     output_addr_const (file, x);
 }
 
-/* This page contains routines to output function prolog and epilog code. */
+/* This page contains routines to output function prolog and epilog code.  */
 
 /* Compute the size of the register stack, and determine if there are any
    call instructions.  */
@@ -1482,7 +1482,7 @@ output_function_epilogue (file, size)
 {
   rtx insn;
   int locals_unavailable = 0;	/* True until after first insn
-				   after gr1 update. */
+				   after gr1 update.  */
 
   /* If we hit a BARRIER before a real insn or CODE_LABEL, we don't
      need to do anything because we are never jumped to.  */
diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h
index 610e405..27b33be 100644
--- a/gcc/config/a29k/a29k.h
+++ b/gcc/config/a29k/a29k.h
@@ -88,7 +88,7 @@ extern int target_flags;
 #define TARGET_NO_REUSE_ARGS	(target_flags & 256)
 
 /* This means that neither builtin nor emulated float operations are
-   available, and that GCC should generate libcalls instead. */
+   available, and that GCC should generate libcalls instead.  */
 
 #define TARGET_SOFT_FLOAT	(target_flags & 512)
 
@@ -162,7 +162,7 @@ extern int target_flags;
    numbered. 
 
    For 29k we can decide arbitrarily since there are no machine instructions
-   for them.  Might as well be consistent with bytes. */
+   for them.  Might as well be consistent with bytes.  */
 #define WORDS_BIG_ENDIAN 1
 
 /* number of bits in an addressable storage unit */
@@ -525,7 +525,7 @@ enum reg_class { NO_REGS, LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS, CR_REGS,
 
 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 
-/* Give names of register classes as strings for dump file.   */
+/* Give names of register classes as strings for dump file.  */
 
 #define REG_CLASS_NAMES				\
  {"NO_REGS", "LR0_REGS", "GENERAL_REGS", "BP_REGS", "FC_REGS", "CR_REGS", \
@@ -1176,7 +1176,7 @@ extern const char *a29k_function_name;
 /* Define as C expression which evaluates to nonzero if the tablejump
    instruction expects the table to contain offsets from the address of the
    table.
-   Do not define this if the table should contain absolute addresses. */
+   Do not define this if the table should contain absolute addresses.  */
 /* #define CASE_VECTOR_PC_RELATIVE 1 */
 
 /* Specify the tree operation to be used to convert reals to integers.  */
@@ -1269,7 +1269,7 @@ extern const char *a29k_function_name;
 #define NO_FUNCTION_CSE
 
 /* Define this to be nonzero if shift instructions ignore all but the low-order
-   few bits. */
+   few bits.  */
 #define SHIFT_COUNT_TRUNCATED 1
 
 /* Compute the cost of computing a constant rtl expression RTX
@@ -1434,7 +1434,7 @@ extern int a29k_debug_reg_map[];
 #define ASM_GLOBALIZE_LABEL(FILE,NAME)	\
   do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
 
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols.  */
 
 #undef USER_LABEL_PREFIX
 #define USER_LABEL_PREFIX "_"
@@ -1447,7 +1447,7 @@ extern int a29k_debug_reg_map[];
 
 /* This is how to output a label for a jump table.  Arguments are the same as
    for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
-   passed. */
+   passed.  */
 
 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN)	\
 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
@@ -1516,7 +1516,7 @@ extern int a29k_debug_reg_map[];
   fprintf (FILE, "\t.word L%d\n", VALUE)
 
 /* This is how to output an element of a case-vector that is relative.
-   Don't define this if it is not supported. */
+   Don't define this if it is not supported.  */
 
 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
 
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 79586d0..5ecc1ec 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -1185,7 +1185,7 @@ arc_output_function_prologue (file, size)
 }
 
 /* Do any necessary cleanup after a function to restore stack, frame,
-   and regs. */
+   and regs.  */
 
 static void
 arc_output_function_epilogue (file, size)
@@ -1920,7 +1920,7 @@ arc_final_prescan_insn (insn, opvec, noperands)
      an if/then/else), and things need to be reversed.  */
   int reverse = 0;
 
-  /* If we start with a return insn, we only succeed if we find another one. */
+  /* If we start with a return insn, we only succeed if we find another one.  */
   int seeking_return = 0;
   
   /* START_INSN will hold the insn from where we start looking.  This is the
@@ -2079,7 +2079,7 @@ arc_final_prescan_insn (insn, opvec, noperands)
 	      /* Succeed if the following insn is the target label.
 		 Otherwise fail.  
 		 If return insns are used then the last insn in a function 
-		 will be a barrier. */
+		 will be a barrier.  */
 	      next_must_be_target_label_p = TRUE;
 	      break;
 
@@ -2098,7 +2098,7 @@ arc_final_prescan_insn (insn, opvec, noperands)
       	      /* If this is an unconditional branch to the same label, succeed.
 		 If it is to another label, do nothing.  If it is conditional,
 		 fail.  */
-	      /* ??? Probably, the test for the SET and the PC are unnecessary. */
+	      /* ??? Probably, the test for the SET and the PC are unnecessary.  */
 
 	      if (GET_CODE (scanbody) == SET
 		  && GET_CODE (SET_DEST (scanbody)) == PC)
@@ -2183,7 +2183,7 @@ arc_final_prescan_insn (insn, opvec, noperands)
       /* Restore recog_data.  Getting the attributes of other insns can
 	 destroy this array, but final.c assumes that it remains intact
 	 across this call; since the insn has been recognized already we
-	 call insn_extract direct. */
+	 call insn_extract direct.  */
       insn_extract (insn);
     }
 }
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 7e1191e..60e1c1e 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -186,7 +186,7 @@ do {				\
 /* Target machine storage layout.  */
 
 /* Define to use software floating point emulator for REAL_ARITHMETIC and
-   decimal <-> binary conversion. */
+   decimal <-> binary conversion.  */
 #define REAL_ARITHMETIC
 
 /* Define this if most significant bit is lowest numbered
@@ -448,7 +448,7 @@ enum reg_class {
 
 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 
-/* Give names of register classes as strings for dump file.   */
+/* Give names of register classes as strings for dump file.  */
 #define REG_CLASS_NAMES \
 { "NO_REGS", "LPCOUNT_REG", "GENERAL_REGS", "ALL_REGS" }
 
@@ -1040,7 +1040,7 @@ arc_select_cc_mode (OP, X, Y)
    of a switch statement.  If the code is computed here,
    return it with a return statement.  Otherwise, break from the switch.  */
 /* Small integers are as cheap as registers.  4 byte values can be fetched
-   as immediate constants - let's give that the cost of an extra insn. */
+   as immediate constants - let's give that the cost of an extra insn.  */
 #define CONST_COSTS(X, CODE, OUTER_CODE) \
   case CONST_INT :						\
     if (SMALL_INT (INTVAL (X)))					\
@@ -1474,7 +1474,7 @@ do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
 /* Define as C expression which evaluates to nonzero if the tablejump
    instruction expects the table to contain offsets from the address of the
    table.
-   Do not define this if the table should contain absolute addresses. */
+   Do not define this if the table should contain absolute addresses.  */
 /* It's not clear what PIC will look like or whether we want to use -fpic
    for the embedded form currently being talked about.  For now require -fpic
    to get pc relative switch tables.  */
@@ -1501,7 +1501,7 @@ do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
 #define MOVE_MAX 4
 
 /* Define this to be nonzero if shift instructions ignore all but the low-order
-   few bits. */
+   few bits.  */
 #define SHIFT_COUNT_TRUNCATED 1
 
 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
@@ -1532,7 +1532,7 @@ do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
    since it hasn't been defined!  */
 extern struct rtx_def *arc_compare_op0, *arc_compare_op1;
 
-/* ARC function types.   */
+/* ARC function types.  */
 enum arc_function_type {
   ARC_FUNCTION_UNKNOWN, ARC_FUNCTION_NORMAL,
   /* These are interrupt handlers.  The name corresponds to the register
diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c
index df4f76e..9f0387c 100644
--- a/gcc/config/vax/vax.c
+++ b/gcc/config/vax/vax.c
@@ -473,7 +473,7 @@ vax_address_cost (addr)
       goto restart;
     }
   /* Indexing and register+offset can both be used (except on a VAX 2)
-     without increasing execution time over either one alone. */
+     without increasing execution time over either one alone.  */
   if (reg && indexed && offset)
     return reg + indir + offset + predec;
   return reg + indexed + indir + offset + predec;
@@ -573,7 +573,7 @@ vax_rtx_cost (x)
       c = 3;
       break;
     case AND:
-      /* AND is special because the first operand is complemented. */
+      /* AND is special because the first operand is complemented.  */
       c = 3;
       if (GET_CODE (XEXP (x, 0)) == CONST_INT)
 	{
@@ -742,7 +742,7 @@ check_float_value (mode, d, overflow)
 }
 
 #if VMS_TARGET
-/* Additional support code for VMS target. */
+/* Additional support code for VMS target.  */
 
 /* Linked list of all externals that are to be emitted when optimizing
    for the global pointer if they haven't been declared by the end of
@@ -863,7 +863,7 @@ vms_asm_out_destructor (symbol, priority)
 }
 #endif /* VMS_TARGET */
 
-/* Additional support code for VMS host. */
+/* Additional support code for VMS host.  */
 /* ??? This should really be in libiberty; vax.c is a target file.  */
 #ifdef QSORT_WORKAROUND
   /*
diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h
index 903e627..78f6f15 100644
--- a/gcc/config/vax/vax.h
+++ b/gcc/config/vax/vax.h
@@ -25,7 +25,7 @@ Boston, MA 02111-1307, USA.  */
 
 #define CPP_PREDEFINES "-Dvax -D__vax__ -Dunix -Asystem=unix -Asystem=bsd -Acpu=vax -Amachine=vax"
 
-/* Use -J option for long branch support with Unix assembler. */
+/* Use -J option for long branch support with Unix assembler.  */
 
 #define ASM_SPEC "-J"
 
@@ -90,7 +90,7 @@ extern int target_flags;
 /* Target machine storage layout */
 
 /* Define for software floating point emulation of VAX format
-   when cross compiling from a non-VAX host. */
+   when cross compiling from a non-VAX host.  */
 /* #define REAL_ARITHMETIC */
 
 /* Define this if most significant bit is lowest numbered
@@ -255,7 +255,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
 
 #define GENERAL_REGS ALL_REGS
 
-/* Give names of register classes as strings for dump file.   */
+/* Give names of register classes as strings for dump file.  */
 
 #define REG_CLASS_NAMES \
  {"NO_REGS", "ALL_REGS" }
@@ -794,7 +794,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
 /* Define as C expression which evaluates to nonzero if the tablejump
    instruction expects the table to contain offsets from the address of the
    table.
-   Do not define this if the table should contain absolute addresses. */
+   Do not define this if the table should contain absolute addresses.  */
 #define CASE_VECTOR_PC_RELATIVE 1
 
 /* Define this if the case instruction drops through after the table
@@ -1093,7 +1093,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
 #define ASM_GLOBALIZE_LABEL(FILE,NAME)	\
   do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
 
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols.  */
 
 #define USER_LABEL_PREFIX "_"
 
diff --git a/gcc/config/we32k/we32k.c b/gcc/config/we32k/we32k.c
index 5ee63ac..32d6bb1 100644
--- a/gcc/config/we32k/we32k.c
+++ b/gcc/config/we32k/we32k.c
@@ -81,7 +81,7 @@ we32k_output_function_prologue (file, size)
    The function epilogue should not depend on the current stack
    pointer!  It should use the frame pointer only.  This is mandatory
    because of alloca; we also take advantage of it to omit stack
-   adjustments before returning. */
+   adjustments before returning.  */
 
 static void
 we32k_output_function_epilogue (file, size)
diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h
index 66f01f9..0007801 100644
--- a/gcc/config/we32k/we32k.h
+++ b/gcc/config/we32k/we32k.h
@@ -50,7 +50,7 @@ extern int target_flags;
 /* target machine storage layout */
 
 /* Define this if most significant bit is lowest numbered
-   in instructions that operate on numbered bit-fields. */
+   in instructions that operate on numbered bit-fields.  */
 #define BITS_BIG_ENDIAN 0
 
 /* Define this if most significant byte of a word is the lowest numbered.  */
@@ -117,11 +117,11 @@ extern int target_flags;
    The hardware registers are assigned numbers for the compiler
    from 0 to just below FIRST_PSEUDO_REGISTER.
    All registers that the compiler knows about must be given numbers,
-   even those that are not normally considered general registers. */
+   even those that are not normally considered general registers.  */
 #define FIRST_PSEUDO_REGISTER 16
 
 /* 1 for registers that have pervasive standard uses
-   and are not available for the register allocator. */
+   and are not available for the register allocator.  */
 #define FIXED_REGISTERS  \
  {0, 0, 0, 0, 0, 0, 0, 0, \
   0, 1, 1, 1, 1, 1, 1, 1, }
@@ -145,11 +145,11 @@ extern int target_flags;
 /* Return number of consecutive hard regs needed starting at reg REGNO
    to hold something of mode MODE.
    This is ordinarily the length in words of a value of mode MODE
-   but can be less for certain modes in special long registers. */
+   but can be less for certain modes in special long registers.  */
 #define HARD_REGNO_NREGS(REGNO, MODE)   \
   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 
-/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
+/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.  */
 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
 
 /* Value is 1 if it is a good idea to tie two pseudo registers
@@ -186,7 +186,7 @@ extern int target_flags;
    is passed to a function.  */
 #define STRUCT_VALUE_REGNUM 2
 
-/* Order in which to allocate registers. */
+/* Order in which to allocate registers.  */
 #define REG_ALLOC_ORDER  \
  {0, 1, 8, 7, 6, 5, 4, 3}
 
@@ -215,7 +215,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 
 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 
-/* Give names of register classes as strings for dump file.   */
+/* Give names of register classes as strings for dump file.  */
 
 #define REG_CLASS_NAMES \
  { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
@@ -249,7 +249,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
    machine description; we zorch the constraint letters that aren't
    appropriate for a specific target.  This allows us to guarantee
    that a specific kind of register will not be used for a given target
-   without fiddling with the register classes above. */
+   without fiddling with the register classes above.  */
 
 #define REG_CLASS_FROM_LETTER(C) \
   ((C) == 'r' ? GENERAL_REGS : NO_REGS)
@@ -258,7 +258,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
    can be used to stand for particular ranges of immediate operands.
    This macro defines what the ranges are.
    C is the letter, and VALUE is a constant value.
-   Return 1 if VALUE is in the range specified by C. */
+   Return 1 if VALUE is in the range specified by C.  */
 
 #define CONST_OK_FOR_LETTER_P(VALUE, C)  0
 
@@ -270,7 +270,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 /* Given an rtx X being reloaded into a reg required to be
    in class CLASS, return the class of reg to actually use.
    In general this is just CLASS; but on some machines
-   in some cases it is preferable to use a more restrictive class. */
+   in some cases it is preferable to use a more restrictive class.  */
 
 #define PREFERRED_RELOAD_CLASS(X,CLASS)  (CLASS)
 
@@ -298,7 +298,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 #define STARTING_FRAME_OFFSET 0
 
 /* If we generate an insn to push BYTES bytes,
-   this says how many the stack pointer really advances by. */
+   this says how many the stack pointer really advances by.  */
 #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
 
 /* Offset of first parameter from the argument pointer register value.  */
@@ -308,7 +308,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
    pops the arguments described by the number-of-args field in the call.
    FUNDECL is the declaration node of the function (as a tree),
    FUNTYPE is the data type of the function (as a tree),
-   or for a library call it is an identifier node for the subroutine name. */
+   or for a library call it is an identifier node for the subroutine name.  */
 
 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (SIZE)
 
@@ -542,7 +542,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
    that is a valid memory address for an instruction.
    The MODE argument is the machine mode for the MEM expression
-   that wants to use this address. */
+   that wants to use this address.  */
 
 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL)			\
 { register rtx Addr = X;						\
@@ -573,12 +573,12 @@ enum reg_class { NO_REGS, GENERAL_REGS,
    GO_IF_LEGITIMATE_ADDRESS.
 
    It is always safe for this macro to do nothing.  It exists to recognize
-   opportunities to optimize the output. */
+   opportunities to optimize the output.  */
 
 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)   { }
 
 /* Go to LABEL if ADDR (a legitimate address expression)
-   has an effect that depends on the machine mode it is used for. */
+   has an effect that depends on the machine mode it is used for.  */
 
 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)	{ }
 
@@ -589,7 +589,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 /* Define as C expression which evaluates to nonzero if the tablejump
    instruction expects the table to contain offsets from the address of the
    table.
-   Do not define this if the table should contain absolute addresses. */
+   Do not define this if the table should contain absolute addresses.  */
 /* #define CASE_VECTOR_PC_RELATIVE 1 */
 
 /* Specify the tree operation to be used to convert reals to integers.  */
@@ -612,7 +612,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 #define SLOW_BYTE_ACCESS 0
 
 /* Define this to be nonzero if shift instructions ignore all but the low-order
-   few bits. */
+   few bits.  */
 #define SHIFT_COUNT_TRUNCATED 1
 
 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
@@ -697,7 +697,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 /* Read-only data goes in the data section because
    AT&T's assembler doesn't guarantee the proper alignment
    of data in the text section even if an align statement
-   is used. */
+   is used.  */
 
 #define READONLY_DATA_SECTION() data_section()
 
@@ -708,7 +708,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",	\
  "r8", "fp", "ap", "psw", "sp", "pcbp", "isp", "pc"	}
 
-/* How to renumber registers for dbx and gdb. */
+/* How to renumber registers for dbx and gdb.  */
 
 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
 
@@ -732,7 +732,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
     fputs ("\n", FILE);			\
   } while (0)
 
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols.  */
 
 #define USER_LABEL_PREFIX ""
 
@@ -843,7 +843,7 @@ do {							\
 #define ASM_OUTPUT_REG_POP(FILE,REGNO)	\
   fprintf (FILE, "\tPOPW %s\n", reg_names[REGNO])
 
-/* This is how to output an element of a case-vector that is absolute. */
+/* This is how to output an element of a case-vector that is absolute.  */
 
 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
   fprintf (FILE, "\t.word .L%d\n", VALUE)
@@ -921,7 +921,7 @@ do {							\
 
 /* Print operand X (an rtx) in assembler syntax to file FILE.
    CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
-   For `%' followed by punctuation, CODE is the punctuation and X is null. */
+   For `%' followed by punctuation, CODE is the punctuation and X is null.  */
 
 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0