diff options
| author | Andrea Corallo <andrea.corallo@arm.com> | 2022-11-28 17:33:58 +0100 |
|---|---|---|
| committer | Andrea Corallo <andrea.corallo@arm.com> | 2023-01-25 14:36:22 +0100 |
| commit | 6764c13b14b036e70da28b0245c1299aecc061a9 (patch) | |
| tree | 2c32dbc89d13a5eb670f778eefaef4ac3b635105 | |
| parent | 59d46d5ba0bf81a7431c0bae1ad8d1024249be47 (diff) | |
| download | gcc-6764c13b14b036e70da28b0245c1299aecc061a9.zip gcc-6764c13b14b036e70da28b0245c1299aecc061a9.tar.gz gcc-6764c13b14b036e70da28b0245c1299aecc061a9.tar.bz2 | |
arm: improve tests for vcaddq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise.
48 files changed, 1312 insertions, 144 deletions
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c index b50a5d5..fb83a1c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vcaddq_rot270_f16 (a, b); } -/* { dg-final { scan-assembler "vcadd.f16" } } */ +/* +**foo1: +** ... +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c index 0a12ff6..f8341a7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vcaddq_rot270_f32 (a, b); } -/* { dg-final { scan-assembler "vcadd.f32" } } */ +/* +**foo1: +** ... +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c index e78bbd5..b4e2ffd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot270_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c index 8b53c66..e7adc1b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot270_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c index 61948bb..fdde2f5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot270_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c index 0bbe24b..1cb6afb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot270_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c index e9cab3d..39f0639 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot270_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c index 25c7125..fd28528 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot270_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c index ee437ee..053a611 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot270_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c index 419ba7e..869983a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot270_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c index 832be00..67b0d0a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vcaddq_rot270_s16 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +/* +**foo1: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c index dbebe22..ab28458 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vcaddq_rot270_s32 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +/* +**foo1: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c index 5f7852f..842d6ad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vcaddq_rot270_s8 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +/* +**foo1: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c index 80b6c0f..97773d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vcaddq_rot270_u16 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +/* +**foo1: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c index 260c5b8..17d5c14 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vcaddq_rot270_u32 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +/* +**foo1: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c index ae9c4f4..faf01a1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vcaddq_rot270_u8 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +/* +**foo1: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c index 4b99c63..f35aaf0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot270_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c index 2532ef7..6446d9e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot270_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c index 676efa8..b92fd2e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot270_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c index 9aa05d5..b8acc67 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot270_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c index 4532296..78ec786 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot270_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c index 51db937..ea78162 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot270_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c index a2e51c1..a43d806 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot270_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c index 6ae7f69..eb9cf0c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot270_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c index e1b21e6..1e78bd1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vcaddq_rot90_f16 (a, b); } -/* { dg-final { scan-assembler "vcadd.f16" } } */ +/* +**foo1: +** ... +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c index 118489e..9611f89 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vcaddq_rot90_f32 (a, b); } -/* { dg-final { scan-assembler "vcadd.f32" } } */ +/* +**foo1: +** ... +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c index e47e242..58608b4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot90_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c index 833aa9c..125dbe5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot90_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c index 46babedb..38e0e47 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot90_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c index 15774e5..455d838 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot90_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c index 6f2bb4d..7217dad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot90_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c index b9113fe..d3edbaa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot90_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c index b7fe510..eb1bf2a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot90_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c index e6c4e9f..3343399 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot90_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c index 8279da9..134fba6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vcaddq_rot90_s16 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +/* +**foo1: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c index 6d59da7..b8e8167 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vcaddq_rot90_s32 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +/* +**foo1: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c index b4f5a22..2a37b8e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vcaddq_rot90_s8 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +/* +**foo1: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c index e203bd0..51e1871 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vcaddq_rot90_u16 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +/* +**foo1: +** ... +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c index 0cba5d5..5905062 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vcaddq_rot90_u32 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +/* +**foo1: +** ... +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c index f4f0476..3737463 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vcaddq_rot90_u8 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +/* +**foo1: +** ... +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vcadd.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c index 476648a..4223c4d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot90_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c index ae9a196..9e67c56 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot90_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c index 16b5949..553fc28 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot90_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c index d30150e..1cd7338 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot90_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c index fa79ce2..13373d4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot90_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c index e18a39e..3f89577 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot90_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c index b9b95fe..34cb036 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot90_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c index b8b8978..d383404 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot90_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file |